 Srinivas Putta
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4c05c181b4
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src: cpu: conv: bf16: fixup zero pad consistency
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2020-09-03 12:57:11 -07:00 |
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Srinivas Putta
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5b706eb986
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benchdnn: fixup: depthwise post-op testcase
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2020-08-05 10:21:31 -07:00 |
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Srinivas Putta
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2dd2f52d02
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benchdnn: conv: input: add regression test for large filter size
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2020-08-05 10:20:21 -07:00 |
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Srinivas Putta
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f974b50ea3
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src: cpu: conv: fixup bwd tail for large filter size
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2020-08-04 16:12:31 -07:00 |
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Srinivas Putta
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af23f69d8a
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fixup: gemm bf16: fix dst offset for f32 datatype
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2020-07-09 14:58:56 -07:00 |
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Srinivas Putta
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5158d63097
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fixup: build: remove nested lambda to fix gcc7.2 build
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2020-07-06 15:32:36 -07:00 |
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Srinivas Putta
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bcc8352277
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benchdnn: add deconv regression test
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2020-07-02 13:24:58 -07:00 |
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Srinivas Putta
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b7b06cddae
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fixup: src: cpu: support channel tails in depthwise deconv
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2020-07-02 13:24:58 -07:00 |
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Srinivas Putta
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5b7e722933
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src: cpu: conv: bf16: bwd_w: support nhwc channel tails
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2020-07-01 09:41:56 -07:00 |
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Srinivas Putta
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841c130319
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src: cpu: jit_bf16_bwd_w: prepare trans_nxc kernels to support channel tails
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2020-07-01 09:41:56 -07:00 |
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Srinivas Putta
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3902496821
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src: cpu: bf16: 1x1-conv: reduce scratchpad requirement
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2020-07-01 09:41:56 -07:00 |
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Srinivas Putta
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faf4ee3204
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src: cpu: conv: jit_avx512_core_bf16: 1x1: nxc: support channel tails
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2020-06-29 09:06:41 -07:00 |
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Srinivas Putta
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40c6f0bb8b
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src: cpu: conv: jit_avx512_core_bf16: non-1x1: nxc: fwd, bwd_d: enable nhwcg loop_order for group convolutions
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2020-06-29 09:06:41 -07:00 |
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Srinivas Putta
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8bd3d824ee
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src: cpu: conv: jit_avx512_core_bf16: non-1x1: nxc: bwd: support ic and oc tail
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2020-06-29 09:06:41 -07:00 |
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Srinivas Putta
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c513dc82e8
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src: cpu: conv: jit_avx512_core_bf16: non-1x1: nxc: fwd: support ic and oc tails
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2020-06-29 09:06:41 -07:00 |
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Srinivas Putta
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63056b8132
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src: cpu: conv: f32: ensure zero padding
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2020-06-23 14:46:18 -07:00 |
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Srinivas Putta
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911af2d62c
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benchdnn: fixup zero padding debug idx
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2020-06-23 14:46:18 -07:00 |
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Srinivas Putta
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632bc8fcc5
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src: cpu: fixup: depthwise fusion bf16
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2020-06-03 15:16:30 -07:00 |
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Srinivas Putta
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edc92d2d63
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src: cpu: convolution: f32: fixup: do not use specialized axb kernel for channel tails
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2020-05-29 12:13:16 -07:00 |
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Srinivas Putta
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b86b658500
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doc: build: fix: add missing leading underscore for build flag DNNL_TEST_THREADPOOL_IMPL
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2020-05-22 16:27:49 -07:00 |
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Srinivas Putta
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f1305352ef
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src: cpu: refine f32 convolution tags to reduce multiple calls to matches_one_of_tag
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2020-05-20 16:28:20 -07:00 |
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Srinivas Putta
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763f3a7528
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src: cpu: support ic and oc tails for nxc layout non-1x1 f32 avx512 jit kernel
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2020-05-20 16:28:20 -07:00 |
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Srinivas Putta
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fefc826d1f
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src: cpu: support ic and oc tails for nxc layout 1x1 f32 avx512 jit kernel
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2020-05-20 16:28:20 -07:00 |
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Srinivas Putta
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485a888efd
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src: cpu: enable nhwc fwd bf16 depthwise convolutions
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2020-05-20 16:05:08 -07:00 |
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Srinivas Putta
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ffde023bd1
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src: cpu: enable nhwc fwd f32 depthwise convolutions
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2020-05-20 16:05:08 -07:00 |
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Srinivas Putta
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a135b7d84c
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src: cpu: correct dw fusion order
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2020-03-27 09:08:21 -07:00 |
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Srinivas Putta
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b6c9e2504e
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src: cpu: klocwork issues fixes
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2020-03-27 09:08:21 -07:00 |
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Srinivas Putta
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afff546bdc
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src: cpu: fixup dw fusion with strides
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2020-03-27 09:08:21 -07:00 |
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Srinivas Putta
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adcbccd6c0
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benchdnn: fixup conv_dw_fusion driver
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2020-03-27 09:08:21 -07:00 |
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Srinivas Putta
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c48d936f5d
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src: cpu: fixup bf16 dw fusion
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2020-03-27 09:08:21 -07:00 |
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Srinivas Putta
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58f99ba455
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src: cpu: fix group conv blocking
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2020-03-24 19:25:06 -07:00 |
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Srinivas Putta
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c012055b3f
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src: cpu: jit_avx512_common: f32: enable ymm based kernel
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2020-03-18 15:29:30 -07:00 |
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Srinivas Putta
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a9b4eba00c
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src: cpu: xmm and ymm based bf16 group convs
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2020-03-18 15:29:30 -07:00 |
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Srinivas Putta
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f7d2f818e0
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benchdnn: inputs: conv: add ResNext101 to topology list
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2020-03-18 15:29:30 -07:00 |
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Srinivas Putta
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e491164cd7
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src: cpu: jit_1x1: f32: fix verbose isa info for avx
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2020-03-18 15:29:30 -07:00 |
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Srinivas Putta
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6ba33e4472
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src: cpu: early check for 2d convolutions in jit depthwise kernel
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2020-03-06 15:32:59 -08:00 |
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Srinivas Putta
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9f507a5c39
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src: cpu: int8: 1x1_depthwise fusion
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2020-03-04 23:01:51 -08:00 |
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Srinivas Putta
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38a92d1a0d
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src: cpu: bf16: 1x1_depthwise fusion
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2020-03-04 23:01:51 -08:00 |
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Srinivas Putta
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9ace76296a
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src: cpu: f32: 1x1_depthwise fusion
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2020-03-04 23:01:51 -08:00 |
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Srinivas Putta
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115a2aa376
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src: cpu: 1x1: fp32: refactor: align sse4.1 and avx2 fwd driver to avx512
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2020-03-04 23:01:51 -08:00 |
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Srinivas Putta
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2e3f7fcde6
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src: cpu: dw: f32,bf16: refactor: jit ow
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2020-03-04 23:01:50 -08:00 |
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Putta, Srinivas
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87f98e00bc
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doc: Depthwise Post-op
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2020-03-04 22:59:55 -08:00 |
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Srinivas Putta
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b2e7452ece
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cpu: reference fused depthwise convolution
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2020-03-04 22:59:55 -08:00 |
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Srinivas Putta
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0608a9fdf4
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refactor: make 'data_type' visible to post-ops
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2020-03-04 20:52:06 -08:00 |
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Srinivas Putta
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4e484f17d3
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build: fix windows gpu build
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2019-11-20 15:49:25 -08:00 |
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Srinivas Putta
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67d67001b6
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src: cpu: 1x1: clean-up: assume pad_r, pad_t are zero
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2019-11-19 13:02:39 -08:00 |
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Srinivas Putta
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403936c6c8
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src: cpu: avx512: enable 8-bit 3d conv
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2019-11-15 00:58:05 -08:00 |
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Srinivas Putta
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dae8325a62
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src: cpu: int8: fix signed dilated deconv
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2019-11-15 00:58:05 -08:00 |
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Srinivas Putta
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a6c92a485d
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benchdnn: deconv: added regression harness
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2019-11-15 00:58:04 -08:00 |
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Srinivas Putta
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70e3929720
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src: cpu: int8: dilated deconv: fixup case when ih<=dh
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2019-11-15 00:58:04 -08:00 |
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Srinivas Putta
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1701ffb2a8
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src: cpu: avx512 ver_4fma: fixup: additional constriant for optimized ic_blocking
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2019-10-31 10:05:25 -07:00 |
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Srinivas Putta
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3f2c2e7e12
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src: cpu: int8: dilated conv: fixup case when ih<=dh
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2019-10-03 15:46:28 -07:00 |
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Srinivas Putta
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8af36e2706
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src: cpu: jit_1x1: return unimplemented for spacial padding
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2019-09-06 16:20:31 -07:00 |
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Srinivas Putta
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aa09f8175a
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src: cpu: dw: bwd_d: fixup stride_w
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2019-09-03 18:24:19 -07:00 |
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Srinivas Putta
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617b304ca3
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cpu:jit 1x1:fixup stride_h
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2019-08-26 08:38:15 -07:00 |
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Srinivas Putta
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76d5689c87
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cpu: pool: jit_i8: avx2: fix segfaults due to invalid access
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2019-06-24 11:00:24 -07:00 |
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Srinivas Putta
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58954e4a73
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cpu: fixup shuffle test-cases
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2019-05-22 20:01:42 -07:00 |
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Srinivas Putta
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f4eae1b883
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cpu: add bf16 shuffle
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2019-05-21 17:20:59 -07:00 |
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Putta, Srinivas
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5926e66393
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cpu: support post_ops in int8 gemm based conv
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2019-05-17 14:14:33 -07:00 |
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Srinivas Putta
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19f4927c2e
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Fix doxygen link in README
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2019-05-08 15:18:36 -07:00 |
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