Srinivas Putta
4c05c181b4
src: cpu: conv: bf16: fixup zero pad consistency
2020-09-03 12:57:11 -07:00
Andrey Kalinin
2c4ad3806e
cpu: x64: 1x1 convolution: plain layout: fix segfault caused by non-correct output channels processing
2020-09-01 17:49:17 -07:00
Soto Flores, Manuel
5250726a5b
src: cpu: avx2: add implicit vmm type for load/store bytes
2020-09-01 11:47:12 -07:00
Soto Flores, Manuel
77e5d5744d
src: cpu: x64: add check in RTUS for unsupported grouped convolution
2020-08-31 12:57:22 -07:00
Chereshnev, Eugene
7a313f95cf
benchdnn: add inputs for Gen9/Gen12LP performance testing
2020-08-24 12:06:59 -07:00
Niels Dekker
c6f9b7a3e5
cpu: make local zero_val const, to avoid internal compiler error vs2019
...
Declared the local variable `zero_val` within the function body of
`im2col` const, to avoid the following error from a Release build of
Visual Studio 2019 version 16.7.1 (compiler version 19.27.29111 for x64):
> D:\oneDNN\src\cpu\gemm_convolution_utils.cpp(401): fatal error C1001: Internal compiler error.
> (compiler file 'd:\agent\_work\7\s\src\vctools\Compiler\Utc\src\p2\main.c', line 195)
> To work around this problem, try simplifying or changing the program near the locations listed above.
> If possible please provide a repro here: https://developercommunity.visualstudio.com
> Please choose the Technical Support command on the Visual C++
> Help menu, or open the Technical Support help file for more information
> CL!RaiseException()+0x69
> CL!RaiseException()+0x69
> CL!CloseTypeServerPDB()+0x22e6b
> CL!CloseTypeServerPDB()+0xcd30a
> Done building project "dnnl_cpu.vcxproj" -- FAILED.
Related compiler problem report: "VS2019 Internal compiler error using
__restrict keyword in Release build"
https://developercommunity.visualstudio.com/content/problem/1145942/vs2019-internal-compiler-error-using-restrict-keyw.html
2020-08-13 19:58:31 +00:00
Fomenko, Evarist M
089a877733
examples: mac: apply workaround for rpath on cmake
2020-08-13 19:58:15 +00:00
Bhavani Subramanian
8186817fa5
fixup: cpu: avx2: zero-pad scratchpad only for nxc format in 1x1 f32 bwd_w driver
2020-08-05 20:36:08 -07:00
Alok Bakshi
d307dfd0a4
tests: benchdnn: inputs: conv: 1D grouped regression shape for bf16 fwd conv
2020-08-05 14:22:48 -07:00
Alok Bakshi
9ebda6517e
src: cpu: x64: group idx fix in jit_avx512 bf16 fwd 1D conv
2020-08-05 14:22:48 -07:00
Srinivas Putta
5b706eb986
benchdnn: fixup: depthwise post-op testcase
2020-08-05 10:21:31 -07:00
Srinivas Putta
2dd2f52d02
benchdnn: conv: input: add regression test for large filter size
2020-08-05 10:20:21 -07:00
Srinivas Putta
f974b50ea3
src: cpu: conv: fixup bwd tail for large filter size
2020-08-04 16:12:31 -07:00
Chereshnev, Eugene
f91e641b87
build: add workaround for MSB8065 warning with MSBuild
2020-07-31 14:03:51 -07:00
Chereshnev, Eugene
fa6bbf40f7
gpu: do not use SVM if OpenCL version is older than 2.0
2020-07-31 14:03:50 -07:00
Glaza, Jan
7cb636aced
benchdnn: add first mem-bound perf test sets
2020-07-29 11:24:48 +02:00
Andrzejewski, Kamil
416caf84f3
cpu: bnorm: fix for illegal division by 0
2020-07-23 11:00:39 +02:00
Shi, Brian
b3540a8fc9
cpu: x64: gemm: Updated dispatching for sgemm small-n TN kernels
2020-07-18 18:08:50 -07:00
Daleki, Jakub
474fce17ba
src: gpu: reorder oscale and post-op work together
2020-07-14 23:46:56 -07:00
Soto Flores, Manuel
bd3efde153
src: cpu: x64: fix load & store byte size
2020-07-14 22:39:49 -07:00
Soto Flores, Manuel
00c1c269ca
src: cpu: x64: fix potential int overflow
2020-07-14 22:39:49 -07:00
Soto Flores, Manuel
47c14aa9aa
src: cpu: x64: fix variable name in unused code path
2020-07-14 22:39:49 -07:00
Shi, Brian
9087f233a3
cpu: x64: gemm: add small-n TN kernels for sgemm
2020-07-13 14:35:59 -07:00
Sergey Kazakov
2a7392d84e
benchdnn: inputs: add regression tests to conv and deconv
2020-07-13 12:59:29 -07:00
Sergey Kazakov
b2693954d9
src: gpu: ocl: fix gen9 f32/f16 BWD conv
2020-07-13 12:59:29 -07:00
Sergey Kazakov
32589ec6ed
fixup: src: gpu: add nhwc support in int8 gen12lp convolution
2020-07-13 12:59:29 -07:00
Shustrov, Nikita
36df879960
cpu: rnn: fix offsets of gates scratchpad in GRU cell
2020-07-13 12:03:14 -07:00
Wierschem, Keola
71f7029cba
fixup: cpu: support ic and oc tails for nxc format in 1x1 f32 avx2 jit kernel
2020-07-09 15:00:23 -07:00
Srinivas Putta
af23f69d8a
fixup: gemm bf16: fix dst offset for f32 datatype
2020-07-09 14:58:56 -07:00
Peter Caday
9b7383be05
gpu: jit: gemm: remove nested lambda to avoid gcc bug
2020-07-09 14:00:43 -07:00
Andrey Kalinin
053bf880eb
cpu: conv: jit avx2: fix cache utilization for some backward by data convolutions
2020-07-09 09:10:38 -07:00
Shustrov, Nikita
8539f02733
cpu: rnn: remove assert, it's not relevant to current algorithm
2020-07-08 12:52:29 -07:00
Peter Caday
2dfaa6ccad
cmake: disable long doubles for intel191
2020-07-08 06:48:21 -07:00
Wierschem, Keola
c55da6927c
fixup: tests: gtest: Add winograd convolution tests
2020-07-07 12:00:14 -07:00
Peter Caday
bb148266c5
gpu: jit: ngen compiler compatibility updates
2020-07-07 09:51:58 -07:00
Srinivas Putta
5158d63097
fixup: build: remove nested lambda to fix gcc7.2 build
2020-07-06 15:32:36 -07:00
Srinivas Putta
bcc8352277
benchdnn: add deconv regression test
2020-07-02 13:24:58 -07:00
Srinivas Putta
b7b06cddae
fixup: src: cpu: support channel tails in depthwise deconv
2020-07-02 13:24:58 -07:00
Annamalai, Anita
89e1c7aa52
build: bumped version to 1.6.0
2020-07-01 16:53:41 -07:00
Alok Bakshi
c6b95d9d0d
tests: gtest: Add winograd convolution tests
2020-07-01 16:41:36 -07:00
Alok Bakshi
8148c65eaf
cpu: x64: wino_conv: fix padding issue for KNx
2020-07-01 16:41:36 -07:00
Wierschem, Keola
fbed502608
gtests: workaround until AMX 1x1 conv supports DW fusion
2020-07-01 16:30:13 -07:00
Wierschem, Keola
fe72358a74
benchdnn: conv: add AMX bf16 kernel coverage for blocked and plain layout
2020-07-01 16:30:13 -07:00
452546c083
cpu: x64: add AMX kernels for int8 and bf16 convolution
...
Co-authored-by: Nikita Shustrov <nikita.a.shustrov@intel.com >
Co-authored-by: Roy Oursler <roy.j.oursler@intel.com >
2020-07-01 16:30:13 -07:00
Wierschem, Keola and Nikita Shustrov
059715036e
all: add new weights formats for AMX convolutions
...
Co-authored-by: Nikita Shustrov <nikita.a.shustrov@intel.com >
2020-07-01 16:30:12 -07:00
aa76be3b3f
cpu: x64: gemm: add AMX s8s8, u8s8 and bf16 gemms
...
Co-authored-by: Arthur Araujo Mitrano <arthur.araujo.mitrano@intel.com >
Co-authored-by: Kazushige Goto <kazushige.goto@intel.com >
Co-authored-by: Mesut Meterelliyoz <mesut.meterelliyoz@intel.com >
2020-07-01 16:30:12 -07:00
Wierschem, Keola and Nikita Shustrov
1ec78a431d
cpu, doc, tests: add AMX ISA utilities
...
Co-authored-by: Nikita Shustrov <nikita.a.shustrov@intel.com >
2020-07-01 16:30:12 -07:00
Wierschem, Keola and Nikita Shustrov
8192cab514
cpu: x64: xbyak: add AMX instructions and CPUID
...
Co-authored-by: Nikita Shustrov <nikita.a.shustrov@intel.com >
2020-07-01 16:30:12 -07:00
Bhavani Subramanian
cd56358e35
cpu: support ic and oc tails for nxc format in 1x1 f32 avx2 jit kernel
2020-07-01 15:04:52 -07:00
Wierschem, Keola
64ad84ad24
doc: update list of supported CPUs
2020-07-01 14:52:53 -07:00
Srinivas Putta