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1365 changed files with 30013 additions and 24804 deletions
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# Set the default behavior, in case people don't have core.autocrlf set.
* text=auto
# Explicitly declare text files you want to always be normalized and converted
# to native line endings on checkout.
*.c text
*.h text
*.cpp text
*.def text
*.rc text
*.i text
*.sh text
*.csh text
*.mk text
*.java text
*.csv text
*.lst text
*.asm text
*.cfg text
*.css text
*.inc text
*.js text
*.rb text
*.strings text
*.txt text
*export.lst text
*.xml text
*.py text
*.md text
*.classpath text
*.cproject text
*.project text
*.properties text
*.java text
*.gradle text
# Declare files that will always have CRLF line endings on checkout.
*.sln text eol=crlf
*.bat text eol=crlf
# Denote all files that are truly binary and should not be modified.
*.png binary
*.jpg binary
*.ico binary
*.spir binary
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# Ignore the debug and release directories created with Makefile builds #
#########################################################################
build/*_debug/
build/*_release/
# Compiled source #
###################
*.com
*.class
*.dll
*.lib
*.pdb
*.exe
*.o
*.so
*.so.1
*.so.2
*.dylib
*.a
*.obj
*.pyc
*.orig
*.raw
*.sample
*.slo
*.swp
*.config
*.la
*.lai
*.lo
*.nhdr
*.nii.gz
*.nrrd
# Packages #
############
# it's better to unpack these files and commit the raw source
# git has its own built in compression methods
*.7z
*.dmg
*.gz
*.iso
*.jar
*.rar
*.tar
*.tgz
*.zip
# Logs and databases #
######################
*.log
*.sql
*.sqlite
# OS generated files #
######################
.DS_Store
.DS_Store?
._*
.Spotlight-V100
.Trashes
ehthumbs.db
Thumbs.db
# IDE generated files #
######################
/.ninja_deps
/.ninja_log
/build.ninja
/rules.ninja
*~
.emacs.desktop
# Build system generated files #
################################
CMakeCache.txt
CMakeFiles/
# Other #
#########
.clang_complete
.idea
.svn
crash*
*.tmp
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The list of most significant changes made over time in
Intel(R) Threading Building Blocks (Intel(R) TBB).
Intel TBB 2017 Update 5
TBB_INTERFACE_VERSION == 9105
Changes (w.r.t. Intel TBB 2017 Update 4):
- Added support for Microsoft* Visual Studio* 2017.
- Added graph/matmult example to demonstrate support for compute offload
to Intel(R) Graphics Technology in the flow graph API.
- The "compiler" build option now allows to specify a full path to the
compiler.
Changes affecting backward compatibility:
- Constructors for many classes, including graph nodes, concurrent
containers, thread-local containers, etc., are declared explicit and
cannot be used for implicit conversions anymore.
Bugs fixed:
- Added a workaround for bug 16657 in the GNU C Library (glibc)
affecting the debug version of tbb::mutex.
- Fixed a crash in pool_identify() called for an object allocated in
another thread.
------------------------------------------------------------------------
Intel TBB 2017 Update 4
TBB_INTERFACE_VERSION == 9104
Changes (w.r.t. Intel TBB 2017 Update 3):
- Added support for C++11 move semantics in parallel_do.
- Added support for FreeBSD* 11.
Changes affecting backward compatibility:
- Minimal compiler versions required for support of C++11 move semantics
raised to GCC 4.5, VS 2012, and Intel(R) C++ Compiler 14.0.
Bugs fixed:
- The workaround for crashes in the library compiled with GCC 6
(-flifetime-dse=1) was extended to Windows*.
------------------------------------------------------------------------
Intel TBB 2017 Update 3
TBB_INTERFACE_VERSION == 9103
Changes (w.r.t. Intel TBB 2017 Update 2):
- Added support for Android* 7.0 and Android* NDK r13, r13b.
Preview Features:
- Added template class gfx_factory to the flow graph API. It implements
the Factory concept for streaming_node to offload computations to
Intel(R) processor graphics.
Bugs fixed:
- Fixed a possible deadlock caused by missed wakeup signals in
task_arena::execute().
Open-source contributions integrated:
- A build fix for Linux* s390x platform by Jerry J.
------------------------------------------------------------------------
Intel TBB 2017 Update 2
TBB_INTERFACE_VERSION == 9102
Changes (w.r.t. Intel TBB 2017 Update 1):
- Removed the long-outdated support for Xbox* consoles.
Bugs fixed:
- Fixed the issue with task_arena::execute() not being processed when
the calling thread cannot join the arena.
- Fixed dynamic memory allocation replacement failure on macOS* 10.12.
------------------------------------------------------------------------
Intel TBB 2017 Update 1
TBB_INTERFACE_VERSION == 9101
Changes (w.r.t. Intel TBB 2017):
Bugs fixed:
- Fixed dynamic memory allocation replacement failures on Windows* 10
Anniversary Update.
- Fixed emplace() method of concurrent unordered containers to not
require a copy constructor.
------------------------------------------------------------------------
Intel TBB 2017
TBB_INTERFACE_VERSION == 9100
@@ -76,6 +170,26 @@ Open-source contributions integrated:
- Enabling use of C++11 'override' keyword by Raf Schietekat.
------------------------------------------------------------------------
Intel TBB 4.4 Update 6
TBB_INTERFACE_VERSION == 9006
Changes (w.r.t. Intel TBB 4.4 Update 5):
- For 64-bit platforms, quadrupled the worst-case limit on the amount
of memory the Intel TBB allocator can handle.
Bugs fixed:
- Fixed a memory corruption in the memory allocator when it meets
internal limits.
- Fixed the memory allocator on 64-bit platforms to align memory
to 16 bytes by default for all allocations bigger than 8 bytes.
- Fixed parallel_scan to provide correct result if the initial value
of an accumulator is not the operation identity value.
- As a workaround for crashes in the Intel TBB library compiled with
GCC 6, added -flifetime-dse=1 to compilation options on Linux* OS.
------------------------------------------------------------------------
Intel TBB 4.4 Update 5
TBB_INTERFACE_VERSION == 9005
@@ -2199,7 +2313,8 @@ Packaging:
are provided separately on Intel(R) Premier.
------------------------------------------------------------------------
Intel and Cilk are registered trademarks or trademarks of Intel Corporation or its
subsidiaries in the United States and other countries.
Intel, the Intel logo, Xeon, Intel Xeon Phi, and Cilk are registered
trademarks or trademarks of Intel Corporation or its subsidiaries in
the United States and other countries.
* Other names and brands may be claimed as the property of others.
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+10 -8
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@@ -1,18 +1,17 @@
# Intel(R) Threading Building Blocks 2017
[![Stable release](https://img.shields.io/badge/version-2017-green.svg)] (https://github.com/01org/tbb/releases/tag/2017)
# Intel(R) Threading Building Blocks 2017 Update 5
[![Stable release](https://img.shields.io/badge/version-2017_U5-green.svg)](https://github.com/01org/tbb/releases/tag/2017_U5)
[![Apache License Version 2.0](https://img.shields.io/badge/license-Apache_2.0-green.svg)](LICENSE)
Intel(R) Threading Building Blocks (Intel(R) TBB) lets you easily write parallel C++ programs that take
full advantage of multicore performance, that are portable, composable and have future-proof scalability.
## Release Information
Here are the latest [Changes] (CHANGES) and [Release Notes]
(doc/Release_Notes.txt) (contains system requirements and known issues).
Here are the latest [Changes](CHANGES) and [Release Notes](doc/Release_Notes.txt) (contains system requirements and known issues).
## Documentation
* Intel(R) TBB [tutorial] (https://software.intel.com/en-us/tbb-tutorial)
* Intel(R) TBB general documentation: [stable] (https://software.intel.com/en-us/tbb-documentation)
and [latest] (https://www.threadingbuildingblocks.org/docs/help/index.htm)
* Intel(R) TBB [tutorial](https://software.intel.com/en-us/tbb-tutorial)
* Intel(R) TBB general documentation: [stable](https://software.intel.com/en-us/tbb-documentation)
and [latest](https://www.threadingbuildingblocks.org/docs/help/index.htm)
## Support
Please report issues and suggestions via
@@ -20,7 +19,10 @@ Please report issues and suggestions via
[Intel(R) TBB forum](http://software.intel.com/en-us/forums/intel-threading-building-blocks/).
## How to Contribute
Please, read the instructions on the official [Intel(R) TBB open source site] (https://www.threadingbuildingblocks.org/submit-contribution).
Please, read the instructions on the official [Intel(R) TBB open source site](https://www.threadingbuildingblocks.org/submit-contribution).
## Engineering team contacts
* [E-mail us.](mailto:inteltbbdevelopers@intel.com)
------------------------------------------------------------------------
Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries.
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+2 -2
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -35,7 +35,7 @@ CPLUS = clang++
CONLY = clang
LIB_LINK_FLAGS = $(DYLIB_KEY) -Wl,-soname=$(BUILDING_LIBRARY)
LIBS += -lpthread -lrt
LINK_FLAGS = -Wl,-rpath-link=. -rdynamic
LINK_FLAGS = -Wl,-rpath-link=. -Wl,-rpath=. -rdynamic
C_FLAGS = $(CPLUS_FLAGS)
ifeq ($(cfg), release)
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+5 -5
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -29,14 +29,14 @@ ifndef arch
endif
ifndef runtime
gcc_version:=$(shell gcc -dumpversion)
clang_version:=$(shell clang -v 2>&1 | grep version | sed "s/.*version \([0-9]*\.[0-9]*\).*/\1/")
os_version:=$(shell uname -r)
os_kernel_version:=$(shell uname -r | sed -e 's/-.*$$//')
export runtime:=cc$(gcc_version)_kernel$(os_kernel_version)
export runtime:=cc$(clang_version)_kernel$(os_kernel_version)
endif
native_compiler := gcc
export compiler ?= gcc
native_compiler := clang
export compiler ?= clang
debugger ?= gdb
CMD=$(SHELL) -c
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -16,6 +16,9 @@
#
#
# TODO: investigate why version_string.ver is not complete when $(RML_SERVER.OBJ) is being compiled.
.NOTPARALLEL:
tbb_root ?= $(TBBROOT)
BUILDING_PHASE=1
TEST_RESOURCE = $(RML.RES)
@@ -84,7 +87,7 @@ ifeq (linux,$(tbb_os))
omp_dynamic_link.$(OBJ): CPLUS_FLAGS+=-fno-exceptions
endif
tbb_misc_rml.$(OBJ): version_string.ver
tbb_misc_rml.$(OBJ) $(RML_SERVER.OBJ): version_string.ver
RML_TEST.OBJ = test_job_automaton.$(OBJ) test_thread_monitor.$(OBJ) test_rml_tbb.$(OBJ) test_rml_omp.$(OBJ) test_rml_mixed.$(OBJ)
@@ -102,6 +105,7 @@ LIB_LINK_FLAGS += $(EXPORT_KEY)rml.def
$(RML.DLL): rml.def
endif
$(RML.DLL): CPLUS_FLAGS += $(SDL_FLAGS)
$(RML.DLL): BUILDING_LIBRARY = $(RML.DLL)
$(RML.DLL): $(RML_TBB_DEP) $(RML_SERVER.OBJ) $(RML.RES) $(RML_NO_VERSION.DLL) $(RML_ASM.OBJ)
$(LIB_LINK_CMD) $(LIB_OUTPUT_KEY)$(RML.DLL) $(RML_SERVER.OBJ) $(RML_TBB_DEP) $(RML_ASM.OBJ) $(RML.RES) $(LIB_LINK_LIBS) $(LIB_LINK_FLAGS)
+2 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -23,6 +23,7 @@
tbb_root ?= "$(TBBROOT)"
BUILDING_PHASE=1
include $(tbb_root)/build/common.inc
CPLUS_FLAGS += $(SDL_FLAGS)
DEBUG_SUFFIX=$(findstring _debug,_$(cfg))
#------------------------------------------------------------
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -82,6 +82,8 @@ MALLOC_LINK_FLAGS += $(EXPORT_KEY)tbbmalloc.def
$(MALLOC.DLL): tbbmalloc.def
endif
$(MALLOC.DLL) $(MALLOCPROXY.DLL): CPLUS_FLAGS += $(SDL_FLAGS)
$(MALLOC.DLL) $(MALLOCPROXY.DLL): M_CPLUS_FLAGS += $(SLD_FLAGS)
$(MALLOC.DLL): BUILDING_LIBRARY = $(MALLOC.DLL)
$(MALLOC.DLL): $(MALLOC.OBJ) $(MALLOC.RES) $(MALLOC_NO_VERSION.DLL)
$(subst $(CPLUS),$(CONLY),$(LIB_LINK_CMD)) $(LIB_OUTPUT_KEY)$(MALLOC.DLL) $(MALLOC.OBJ) $(MALLOC.RES) $(LIB_LINK_LIBS) $(MALLOC_LINK_FLAGS)
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+10 -7
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -100,12 +100,14 @@ $(TWICE_LINKED_TESTS): LINK_FILES+=$(@:.$(TEST_EXT)=_secondary.$(OBJ))
test_dynamic_link%.$(TEST_EXT): LINK_TBB.LIB =
test_dynamic_link.$(TEST_EXT): LIBS += $(LIBDL)
TEST_BIG_OBJ = test_opencl_node.$(TEST_EXT) test_join_node.$(TEST_EXT) test_atomic.$(TEST_EXT)
ifeq (windows_windows,$(tbb_os)_$(target))
ifneq (gcc,$(compiler))
$(TEST_BIG_OBJ): override CXXFLAGS += /bigobj
endif
# Resolving issue with the number of sections that an object file can contain
ifneq (,$(BIGOBJ_KEY))
TEST_BIGOBJ = test_opencl_node.$(TEST_EXT) \
test_join_node.$(TEST_EXT) \
test_atomic.$(TEST_EXT) \
test_concurrent_unordered_set.$(TEST_EXT) \
test_concurrent_unordered_map.$(TEST_EXT)
$(TEST_BIGOBJ): override CXXFLAGS += $(BIGOBJ_KEY)
endif
# TODO: remove repetition of .$(TEST_EXT) in the list bellow
@@ -225,6 +227,7 @@ ifdef CILK_AVAILABLE
# The issue reveals itself if a version of binutils is prior to 2.17
ifeq (linux_icc,$(tbb_os)_$(compiler))
test_cilk_interop.$(TEST_EXT): LIBS += -lcilkrts
test_gfx_factory.$(TEST_EXT): LIBS += -lcilkrts
endif
test_tbb_cilk: test_cilk_interop.$(TEST_EXT)
$(run_cmd) ./test_cilk_interop.$(TEST_EXT) $(args)
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+4 -4
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -26,7 +26,7 @@ OUTPUTOBJ_KEY = -o #
PIC_KEY = -fPIC
WARNING_AS_ERROR_KEY = -Werror
WARNING_KEY = -Wall
SDL_FLAGS = -fPIE -fPIC -fstack-protector -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security
SDL_FLAGS = -fPIE -fPIC -fstack-protector -Wformat -Wformat-security
TEST_WARNING_KEY = -Wshadow -Wcast-qual -Woverloaded-virtual -Wnon-virtual-dtor -Wextra
WARNING_SUPPRESS = -Wno-parentheses -Wno-non-virtual-dtor
@@ -50,13 +50,13 @@ LINK_FLAGS = -Wl,-rpath-link=. -rdynamic
C_FLAGS = $(CPLUS_FLAGS)
ifeq ($(cfg), release)
SDL_FLAGS += -D_FORTIFY_SOURCE=2
CPLUS_FLAGS = -O2
endif
ifeq ($(cfg), debug)
CPLUS_FLAGS = -g -O0 $(DEFINE_KEY)TBB_USE_DEBUG
endif
CPLUS_FLAGS += $(SDL_FLAGS)
CPLUS_FLAGS += $(DEFINE_KEY)USE_PTHREAD $(DEFINE_KEY)_GLIBCXX_HAVE_FENV_H
ifneq (,$(findstring $(arch),ia32 intel64))
@@ -71,7 +71,7 @@ endif
CPLUS_FLAGS += --sysroot=$(SYSROOT)
LIB_LINK_FLAGS += --sysroot=$(SYSROOT)
LIBS = -L$(CPLUS_LIB_PATH) -lc++_shared
ifneq (,$(findstring r12, $(ndk_version)))
ifneq (,$(findstring $(ndk_version),r12 r12b r13 r13b))
LIBS += -lc++abi
ifeq (arm,$(arch))
LIBS += -lunwind
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+2 -3
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -29,8 +29,7 @@ ifeq (64,$(findstring 64,$(arch)))
def_prefix = lin64
endif
ifdef ANDROID_NDK_ROOT
ndk_version:= $(lastword $(subst -, ,$(ANDROID_NDK_ROOT)))
ifdef ndk_version
$(warning "NDK version $(ndk_version)")
else
$(warning "NDK version not set in environment, using \'unknown\' instead.")
+1 -1
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@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+2 -3
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -29,8 +29,7 @@ ifeq (64,$(findstring 64,$(arch)))
def_prefix = lin64
endif
ifdef ANDROID_NDK_ROOT
ndk_version:= $(lastword $(subst -, ,$(ANDROID_NDK_ROOT)))
ifdef ndk_version
$(warning "NDK version $(ndk_version)")
else
$(warning "NDK version not set in environment, using \'unknown\' instead.")
+2 -3
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -29,8 +29,7 @@ ifeq (64,$(findstring 64,$(arch)))
def_prefix = lin64
endif
ifdef ANDROID_NDK_ROOT
ndk_version:= $(lastword $(subst -, ,$(ANDROID_NDK_ROOT)))
ifdef ndk_version
ndk_version:= $(firstword $(subst /, ,$(ndk_version)))
ndk_version:= $(firstword $(subst \, ,$(ndk_version)))
$(warning "NDK version $(ndk_version)")
+1 -1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+9 -9
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -45,7 +45,7 @@ endif
ifdef cpp0x
$(warning "Warning: deprecated cpp0x=$(cpp0x) is used, stdver must be used instead. Building in stdver=c++0x mode.")
export stdver ?= c++0x
export stdver?=c++0x
override cpp0x=
endif
@@ -54,13 +54,13 @@ ifneq (,$(stdver))
$(warning "Warning: unexpected stdver=$(stdver) is used.")
endif
CXX_STD_FLAGS = -std=$(stdver) -D_TBB_CPP0X
CXX_STD_FLAGS=-std=$(stdver) -D_TBB_CPP0X
endif
# The requested option is added unconditionally.
# If it is not supported, a compiler warning or error is expected.
# Note that CXX_STD_FLAGS can be changed in <os>.<compiler>.inc.
CXX_ONLY_FLAGS += $(CXX_STD_FLAGS)
CXX_ONLY_FLAGS+=$(CXX_STD_FLAGS)
ifeq (,$(wildcard $(tbb_root)/build/$(tbb_os).inc))
$(error "$(tbb_os)" is not supported. Add build/$(tbb_os).inc file with os-specific settings )
@@ -100,23 +100,23 @@ cross_cfg = $(if $(crosstest),$(call flip_cfg,$(1)),$(1))
# Setting default configuration to release
cfg?=release
compiler_name=$(notdir $(compiler))
ifdef BUILDING_PHASE
ifndef target
target:=$(tbb_os)
endif
# process host/target compiler-dependent build configuration
ifeq (,$(wildcard $(tbb_root)/build/$(target).$(compiler).inc))
$(error "$(compiler)" is not supported on $(target). Add build/$(target).$(compiler).inc file with compiler-specific settings. )
ifeq (,$(wildcard $(tbb_root)/build/$(target).$(compiler_name).inc))
$(error "$(compiler_name)" is not supported on $(target). Add build/$(target).$(compiler_name).inc file with compiler-specific settings. )
endif
include $(tbb_root)/build/$(target).$(compiler).inc
include $(tbb_root)/build/$(target).$(compiler_name).inc
endif
ifneq ($(BUILDING_PHASE),1)
# definitions for top-level Makefiles
origin_build_dir:=$(origin tbb_build_dir)
tbb_build_dir?=$(tbb_root)$(SLASH)build
export tbb_build_prefix?=$(tbb_os)_$(arch)_$(compiler)_$(runtime)$(CPF_SUFFIX)
export tbb_build_prefix?=$(tbb_os)_$(arch)_$(compiler_name)_$(runtime)$(CPF_SUFFIX)
work_dir=$(tbb_build_dir)$(SLASH)$(tbb_build_prefix)
endif # BUILDING_PHASE != 1
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@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -149,7 +149,7 @@ $(TBB.MANIFEST):
version_string.ver: $(TBB.MANIFEST)
$(MAKE_VERSIONS)
cmd /C "echo #define TBB_MANIFEST 1 >> version_string.ver"
# TODO: fix parallel build by writting to a temporary file and rename it when complete
# TODO: fix parallel build by writing to a temporary file and rename it when complete
else
# TODO: make version strings directly representative for all the libraries
version_string.ver:
+155 -148
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@@ -1,4 +1,4 @@
// Copyright (c) 2005-2016 Intel Corporation
// Copyright (c) 2005-2017 Intel Corporation
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -16,166 +16,173 @@
//
//
function readAllFromFile(fname) {
var fso = new ActiveXObject("Scripting.FileSystemObject");
var file = null;
try {
file = fso.OpenTextFile(fname, 1, 0);
return (file.readAll());
} finally {
// Close the file in the finally section to guarantee that it will be closed in any case
// (if the exception is thrown or not).
file.Close();
}
}
function doWork() {
var WshShell = WScript.CreateObject("WScript.Shell");
var WshShell = WScript.CreateObject("WScript.Shell");
var fso = new ActiveXObject("Scripting.FileSystemObject");
var tmpExec = WshShell.Run("cmd /c echo int main(){return 0;} >detect.c", 0, true);
var tmpExec;
tmpExec = WshShell.Run("cmd /c echo int main(){return 0;} >detect.c", 0, true);
// The next block deals with GCC (MinGW)
if (WScript.Arguments.Count() > 1) {
var compilerPath = WScript.Arguments(1);
// The RegExp matches everything up to and including the last slash (it uses a greedy approach.)
var compilerName = compilerPath.replace(/^.*[\/\\]/, "");
if (compilerName.match(/gcc/i) != null) {
if (WScript.Arguments(0) == "/arch") {
// Get predefined macros
tmpExec = WshShell.Run("cmd /C " + compilerPath + " -dM -E detect.c > detect.map", 0, true);
var defs = readAllFromFile("detect.map");
//detect target architecture
var intel64 = /x86_64|amd64/mgi;
var ia32 = /i386/mgi;
if (defs.match(intel64)) {
WScript.Echo("intel64");
} else if (defs.match(ia32)) {
WScript.Echo("ia32");
} else {
WScript.Echo("unknown");
}
} else {
tmpExec = WshShell.Exec(compilerPath + " -dumpversion");
var gccVersion = tmpExec.StdOut.ReadLine();
if (WScript.Arguments(0) == "/runtime") {
WScript.Echo("mingw" + gccVersion);
}
else if (WScript.Arguments(0) == "/minversion") {
// Comparing strings, not numbers; will not work for two-digit versions
if (gccVersion >= WScript.Arguments(2)) {
WScript.Echo("ok");
} else {
WScript.Echo("fail");
}
}
}
return;
}
}
// The next block deals with GCC (MinGW)
if ( WScript.Arguments.Count() > 1 && WScript.Arguments(1) == "gcc" ) {
if ( WScript.Arguments(0) == "/arch" ) {
// Get predefined macros
tmpExec = WshShell.Run("cmd /C gcc -dM -E detect.c > detect.map", 0, true);
var file = fso.OpenTextFile("detect.map", 1, 0);
var defs = file.readAll();
file.Close();
//Compile binary
tmpExec = WshShell.Exec("cl /MD detect.c /link /MAP");
while (tmpExec.Status == 0) {
WScript.Sleep(100);
}
//compiler banner that includes version and target arch was printed to stderr
var clVersion = tmpExec.StdErr.ReadAll();
//detect target architecture
var intel64=/x86_64|amd64/mgi;
var ia32=/i386/mgi;
if ( defs.match(intel64) ) {
WScript.Echo( "intel64" );
} else if ( defs.match(ia32) ) {
WScript.Echo( "ia32" );
} else {
WScript.Echo( "unknown" );
}
} else {
tmpExec = WshShell.Exec("gcc -dumpversion");
var gcc_version = tmpExec.StdOut.ReadLine();
if ( WScript.Arguments(0) == "/runtime" ) {
WScript.Echo( "mingw"+gcc_version );
}
else if ( WScript.Arguments(0) == "/minversion" ) {
// Comparing strings, not numbers; will not work for two-digit versions
if ( gcc_version >= WScript.Arguments(2) ) {
WScript.Echo( "ok" );
} else {
WScript.Echo( "fail" );
}
}
}
return;
}
if (WScript.Arguments(0) == "/arch") {
//detect target architecture
var intel64 = /AMD64|EM64T|x64/mgi;
var ia32 = /[80|\s]x86/mgi;
var arm = /ARM/mgi;
if (clVersion.match(intel64)) {
WScript.Echo("intel64");
} else if (clVersion.match(ia32)) {
WScript.Echo("ia32");
} else if (clVersion.match(arm)) {
WScript.Echo("armv7");
} else {
WScript.Echo("unknown");
}
return;
}
//Compile binary
tmpExec = WshShell.Exec("cl /MD detect.c /link /MAP");
while ( tmpExec.Status == 0 ) {
WScript.Sleep(100);
}
//compiler banner that includes version and target arch was printed to stderr
var clVersion = tmpExec.StdErr.ReadAll();
if (WScript.Arguments(0) == "/runtime") {
//read map-file
var mapContext = readAllFromFile("detect.map");
//detect runtime
var vc71 = /MSVCR71\.DLL/mgi;
var vc80 = /MSVCR80\.DLL/mgi;
var vc90 = /MSVCR90\.DLL/mgi;
var vc100 = /MSVCR100\.DLL/mgi;
var vc110 = /MSVCR110\.DLL/mgi;
var vc120 = /MSVCR120\.DLL/mgi;
var vc140 = /VCRUNTIME140\.DLL/mgi;
var psdk = /MSVCRT\.DLL/mgi;
if (mapContext.match(vc71)) {
WScript.Echo("vc7.1");
} else if (mapContext.match(vc80)) {
WScript.Echo("vc8");
} else if (mapContext.match(vc90)) {
WScript.Echo("vc9");
} else if (mapContext.match(vc100)) {
WScript.Echo("vc10");
} else if (mapContext.match(vc110)) {
WScript.Echo("vc11");
} else if (mapContext.match(vc120)) {
WScript.Echo("vc12");
} else if (mapContext.match(vc140)) {
WScript.Echo("vc14");
} else {
WScript.Echo("unknown");
}
return;
}
if ( WScript.Arguments(0) == "/arch" ) {
//detect target architecture
var intel64=/AMD64|EM64T|x64/mgi;
var ia32=/[80|\s]x86/mgi;
var arm=/ARM/mgi;
if ( clVersion.match(intel64) ) {
WScript.Echo( "intel64" );
} else if ( clVersion.match(ia32) ) {
WScript.Echo( "ia32" );
} else if ( clVersion.match(arm) ) {
WScript.Echo( "armv7" );
} else {
WScript.Echo( "unknown" );
}
return;
}
if ( WScript.Arguments(0) == "/runtime" ) {
//read map-file
var map = fso.OpenTextFile("detect.map", 1, 0);
var mapContext = map.readAll();
map.Close();
//detect runtime
var vc71=/MSVCR71\.DLL/mgi;
var vc80=/MSVCR80\.DLL/mgi;
var vc90=/MSVCR90\.DLL/mgi;
var vc100=/MSVCR100\.DLL/mgi;
var vc110=/MSVCR110\.DLL/mgi;
var vc120=/MSVCR120\.DLL/mgi;
var vc140=/VCRUNTIME140\.DLL/mgi;
var psdk=/MSVCRT\.DLL/mgi;
if ( mapContext.match(vc71) ) {
WScript.Echo( "vc7.1" );
} else if ( mapContext.match(vc80) ) {
WScript.Echo( "vc8" );
} else if ( mapContext.match(vc90) ) {
WScript.Echo( "vc9" );
} else if ( mapContext.match(vc100) ) {
WScript.Echo( "vc10" );
} else if ( mapContext.match(vc110) ) {
WScript.Echo( "vc11" );
} else if ( mapContext.match(vc120) ) {
WScript.Echo( "vc12" );
} else if ( mapContext.match(vc140) ) {
WScript.Echo( "vc14" );
} else {
WScript.Echo( "unknown" );
}
return;
}
if ( WScript.Arguments(0) == "/minversion" ) {
var compiler_version;
if ( WScript.Arguments(1) == "cl" ) {
compiler_version = clVersion.match(/Compiler Version ([0-9.]+)\s/mi)[1];
// compiler_version is in xx.xx.xxxxx.xx format, i.e. a string.
// It will compare well with major.minor versions where major has two digits,
// which is sufficient as the versions of interest start from 13 (for VC7).
} else if ( WScript.Arguments(1) == "icl" ) {
// Get predefined ICL macros
tmpExec = WshShell.Run("cmd /C icl /QdM /E detect.c > detect.map", 0, true);
var file = fso.OpenTextFile("detect.map", 1, 0);
var defs = file.readAll();
file.Close();
// In #define __INTEL_COMPILER XXYY, XX is the major ICL version, YY is minor
compiler_version = defs.match(/__INTEL_COMPILER[ \t]*([0-9]+).*$/mi)[1]/100;
// compiler version is a number; it compares well with another major.minor
// version number, where major has one, two, and perhaps more digits (9.1, 11, etc).
}
if ( compiler_version >= WScript.Arguments(2) ) {
WScript.Echo( "ok" );
} else {
WScript.Echo( "fail" );
}
return;
}
if (WScript.Arguments(0) == "/minversion") {
var compilerVersion;
if (WScript.Arguments(1) == "cl") {
compilerVersion = clVersion.match(/Compiler Version ([0-9.]+)\s/mi)[1];
// compilerVersion is in xx.xx.xxxxx.xx format, i.e. a string.
// It will compare well with major.minor versions where major has two digits,
// which is sufficient as the versions of interest start from 13 (for VC7).
} else if (WScript.Arguments(1) == "icl") {
// Get predefined ICL macros
tmpExec = WshShell.Run("cmd /C icl /QdM /E detect.c > detect.map", 0, true);
var defs = readAllFromFile("detect.map");
// In #define __INTEL_COMPILER XXYY, XX is the major ICL version, YY is minor
compilerVersion = defs.match(/__INTEL_COMPILER[ \t]*([0-9]+).*$/mi)[1] / 100;
// compiler version is a number; it compares well with another major.minor
// version number, where major has one, two, and perhaps more digits (9.1, 11, etc).
}
if (compilerVersion >= WScript.Arguments(2)) {
WScript.Echo("ok");
} else {
WScript.Echo("fail");
}
return;
}
}
function doClean() {
var fso = new ActiveXObject("Scripting.FileSystemObject");
// delete intermediate files
if ( fso.FileExists("detect.c") )
fso.DeleteFile ("detect.c", false);
if ( fso.FileExists("detect.obj") )
fso.DeleteFile ("detect.obj", false);
if ( fso.FileExists("detect.map") )
fso.DeleteFile ("detect.map", false);
if ( fso.FileExists("detect.exe") )
fso.DeleteFile ("detect.exe", false);
if ( fso.FileExists("detect.exe.manifest") )
fso.DeleteFile ("detect.exe.manifest", false);
var fso = new ActiveXObject("Scripting.FileSystemObject");
// delete intermediate files
if (fso.FileExists("detect.c"))
fso.DeleteFile("detect.c", false);
if (fso.FileExists("detect.obj"))
fso.DeleteFile("detect.obj", false);
if (fso.FileExists("detect.map"))
fso.DeleteFile("detect.map", false);
if (fso.FileExists("detect.exe"))
fso.DeleteFile("detect.exe", false);
if (fso.FileExists("detect.exe.manifest"))
fso.DeleteFile("detect.exe.manifest", false);
}
if ( WScript.Arguments.Count() > 0 ) {
try {
doWork();
} catch( error ) {
WScript.Echo( "unknown" );
}
doClean();
if (WScript.Arguments.Count() > 0) {
try {
doWork();
} catch (error) {
WScript.Echo("unknown");
}
doClean();
} else {
WScript.Echo( "Supported options:\n"
+ "\t/arch [compiler]\n"
+ "\t/runtime [compiler]\n"
+ "\t/minversion compiler version" );
WScript.Echo("Supported options:\n"
+ "\t/arch [compiler]\n"
+ "\t/runtime [compiler]\n"
+ "\t/minversion compiler version");
}
+1 -7
View File
@@ -1,6 +1,6 @@
@echo off
REM
REM Copyright (c) 2005-2016 Intel Corporation
REM Copyright (c) 2005-2017 Intel Corporation
REM
REM Licensed under the Apache License, Version 2.0 (the "License");
REM you may not use this file except in compliance with the License.
@@ -26,7 +26,6 @@ set fslash_bin_dir=%bin_dir:\=/%
set _INCLUDE=INCLUDE& set _LIB=LIB
if not x%UNIXMODE%==x set _INCLUDE=CPATH& set _LIB=LIBRARY_PATH
if exist tbbvars.bat goto skipbat
echo Generating local tbbvars.bat
echo @echo off>tbbvars.bat
echo SET TBBROOT=%actual_root%>>tbbvars.bat
@@ -36,9 +35,7 @@ echo SET %_INCLUDE%=%%TBBROOT%%\include;%%%_INCLUDE%%%>>tbbvars.bat
echo SET %_LIB%=%bin_dir%;%%%_LIB%%%>>tbbvars.bat
echo SET PATH=%bin_dir%;%%PATH%%>>tbbvars.bat
if not x%UNIXMODE%==x echo SET LD_LIBRARY_PATH=%bin_dir%;%%LD_LIBRARY_PATH%%>>tbbvars.bat
:skipbat
if exist tbbvars.sh goto skipsh
echo Generating local tbbvars.sh
echo #!/bin/sh>tbbvars.sh
echo export TBBROOT="%fslash_root%">>tbbvars.sh
@@ -48,9 +45,7 @@ echo export %_INCLUDE%="${TBBROOT}/include;$%_INCLUDE%">>tbbvars.sh
echo export %_LIB%="%fslash_bin_dir%;$%_LIB%">>tbbvars.sh
echo export PATH="%fslash_bin_dir%;$PATH">>tbbvars.sh
if not x%UNIXMODE%==x echo export LD_LIBRARY_PATH="%fslash_bin_dir%;$LD_LIBRARY_PATH">>tbbvars.sh
:skipsh
if exist tbbvars.csh goto skipcsh
echo Generating local tbbvars.csh
echo #!/bin/csh>tbbvars.csh
echo setenv TBBROOT "%actual_root%">>tbbvars.csh
@@ -60,7 +55,6 @@ echo setenv %_INCLUDE% "${TBBROOT}\include;$%_INCLUDE%">>tbbvars.csh
echo setenv %_LIB% "%bin_dir%;$%_LIB%">>tbbvars.csh
echo setenv PATH "%bin_dir%;$PATH">>tbbvars.csh
if not x%UNIXMODE%==x echo setenv LD_LIBRARY_PATH "%bin_dir%;$LD_LIBRARY_PATH">>tbbvars.csh
:skipcsh
if not x%LIB_STL_ANDROID%==x (
REM Workaround for copying Android* specific stl shared library to work folder
+3 -3
View File
@@ -1,6 +1,6 @@
#!/bin/bash
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -23,7 +23,7 @@ bin_dir="$PWD" #
cd "$tbb_root" # keep this comments here
tbb_root="$PWD" # to make it unsensible
cd "$bin_dir" # to EOL encoding
[ -f ./tbbvars.sh ] || cat >./tbbvars.sh <<EOF
cat >./tbbvars.sh <<EOF
#!/bin/bash
export TBBROOT="${tbb_root}" #
tbb_bin="${bin_dir}" #
@@ -44,7 +44,7 @@ else #
fi #
${TBB_CUSTOM_VARS_SH} #
EOF
[ -f ./tbbvars.csh ] || cat >./tbbvars.csh <<EOF
cat >./tbbvars.csh <<EOF
#!/bin/csh
setenv TBBROOT "${tbb_root}" #
setenv tbb_bin "${bin_dir}" #
+7 -7
View File
@@ -28,7 +28,7 @@ The files here are not intended to be used directly. See below for usage.
<DT>&lt;os&gt;.&lt;compiler&gt;.inc
<DD>Compiler-specific Makefile for a particular &lt;os&gt; / &lt;compiler&gt; combination.
<DT>*.sh
<DD>Infrastructure utilities for Linux* OS, OS X*, and UNIX*-related operating systems.
<DD>Infrastructure utilities for Linux* OS, macOS*, and UNIX*-related operating systems.
<DT>*.js, *.bat
<DD>Infrastructure utilities for Windows* OS.
</DL>
@@ -43,7 +43,7 @@ To port Intel TBB to a new platform, operating system or architecture, see the <
<LI>C++ compiler for the platform, operating system and architecture of interest.
Either the native compiler for your system, or, optionally, the appropriate Intel&reg; C++ compiler, may be used.
<LI>GNU make utility. On Windows OS, if a UNIX* emulator is used to run GNU make,
it should be able to run Windows OS utilities and commands. On Linux OS, OS X, etc.,
it should be able to run Windows OS utilities and commands. On Linux OS, macOS, etc.,
shell commands issued by GNU make should execute in a Bourne or BASH compatible shell.
In the following examples, replace <TT>make</TT> with the correct GNU make command for
your system (for example, <TT>gmake</TT>). GNU make version 3.80 and more recent are supported.
@@ -53,7 +53,7 @@ To port Intel TBB to a new platform, operating system or architecture, see the <
Intel TBB libraries can be built by performing the following steps.
On systems that support only one ABI (e.g., 32-bit), these steps build the libraries for that ABI.
On systems that support both 64-bit and 32-bit libraries, these steps build the 64-bit libraries
(Linux OS, OS X, and related systems) or whichever ABI is selected in the development environment (Windows OS).
(Linux OS, macOS, and related systems) or whichever ABI is selected in the development environment (Windows OS).
</P>
<OL>
<LI>Change to the <A HREF="../index.html">top-level directory</A> of the installed software.
@@ -63,7 +63,7 @@ On systems that support both 64-bit and 32-bit libraries, these steps build the
</OL>
<P>
To build Intel TBB libraries for other than the default ABI (e.g., to build 32-bit libraries on Linux OS, OS X,
To build Intel TBB libraries for other than the default ABI (e.g., to build 32-bit libraries on Linux OS, macOS,
or related systems that support both 64-bit and 32-bit libraries), perform the following steps:
</P>
<OL>
@@ -88,7 +88,7 @@ See also the list of other targets below.
By default, the libraries will be built in sub-directories within the build/ directory.
The sub-directories are named according to the operating system, architecture, compiler and software environment used
(the sub-directory names also distinguish release vs. debug libraries). On Linux OS, the software environment comprises
the GCC, libc and kernel version used. On OS X, the software environment comprises the GCC and OS version used.
the GCC, libc and kernel version used. On macOS, the software environment comprises the GCC and OS version used.
On Windows OS, the software environment comprises the Microsoft* Visual Studio* version used.
See below for how to change the default build directory.
</P>
@@ -124,7 +124,7 @@ To perform different build and/or test operations, use the following steps.
<DT><TT>make compiler=<B>{</B>icl, icc, gcc, clang<B>}</B> <B>[</B>(above options or targets)<B>]</B></TT>
<DD>Build and run as above, but use specified compilers instead of default, native compilers
<ol>
<li><tt><b> {</b>icl, icc<b>}</b> </tt> - to use Intel&reg; compilers (<tt>icl</tt> on Windows OS, <tt>icc</tt> on Linux OS or OS X). </li>
<li><tt><b> {</b>icl, icc<b>}</b> </tt> - to use Intel&reg; compilers (<tt>icl</tt> on Windows OS, <tt>icc</tt> on Linux OS or macOS). </li>
<li><tt>gcc</tt> - to use g++ (e.g. MinGW on Windows OS)</li>
<li><tt>clang</tt> - to use Clang compiler</li>
</ol>
@@ -233,7 +233,7 @@ See the Makefile infrastructure files for examples.
<HR>
<A HREF="../index.html">Up to parent directory</A>
<P></P>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<P></P>
Intel, the Intel logo and Itanium are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries.
<p></p>
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+6 -3
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -29,17 +29,20 @@ DYLIB_KEY = -shared
EXPORT_KEY = -Wl,--version-script,
NOINTRINSIC_KEY = -fno-builtin
LIBDL = -ldl
SDL_FLAGS += -fstack-protector -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security
ifneq (,$(shell icc -dumpversion | egrep "1[2-9]\."))
SDL_FLAGS = -fstack-protector -Wformat -Wformat-security
endif
CPLUS = icpc
CONLY = icc
ITT_NOTIFY = -DDO_ITT_NOTIFY
ifeq (release,$(cfg))
SDL_FLAGS += -D_FORTIFY_SOURCE=2
CPLUS_FLAGS = $(ITT_NOTIFY) -O2 -g -DUSE_PTHREAD
else
CPLUS_FLAGS = $(ITT_NOTIFY) -O0 -g -DUSE_PTHREAD -DTBB_USE_DEBUG
endif
CPLUS_FLAGS += $(SDL_FLAGS)
LIB_LINK_FLAGS = -shared -static-intel -Wl,-soname=$(BUILDING_LIBRARY) -z relro -z now
LIBS += -lpthread -lrt
+2 -2
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -99,7 +99,7 @@ SONAME_SUFFIX =$(shell grep TBB_COMPATIBLE_INTERFACE_VERSION $(tbb_root)/include
ifeq ($(arch),ia64)
def_prefix = lin64ipf
endif
ifeq ($(arch),sparc)
ifneq (,$(findstring $(arch),sparc s390x))
def_prefix = lin64
endif
ifeq ($(arch),armv7)
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+6 -3
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -27,7 +27,10 @@ OUTPUTOBJ_KEY = -o #
PIC_KEY = -fPIC
WARNING_AS_ERROR_KEY = -Werror
WARNING_KEY = -w1
SDL_FLAGS=-fstack-protector -D_FORTIFY_SOURCE=2 -Wformat -Wformat-security
ifneq (,$(shell icc -dumpversion | egrep "1[2-9]\."))
SDL_FLAGS = -fstack-protector -Wformat -Wformat-security
endif
DYLIB_KEY = -dynamiclib
EXPORT_KEY = -Wl,-exported_symbols_list,
LIBDL = -ldl
@@ -49,12 +52,12 @@ ifneq (,$(shell icc -dumpversion | egrep "^1[2-9]\."))
endif
ifeq ($(cfg), release)
SDL_FLAGS += -D_FORTIFY_SOURCE=2
CPLUS_FLAGS = -g -O2 -fno-omit-frame-pointer
else
CPLUS_FLAGS = -g -O0 -DTBB_USE_DEBUG
endif
CPLUS_FLAGS += $(SDL_FLAGS)
CPLUS_FLAGS += -DUSE_PTHREAD
ifneq (,$(codecov))
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+4 -3
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -29,11 +29,12 @@ DYLIB_KEY = -shared -Wl,-soname=$@
EXPORT_KEY = -Wl,--version-script,
NOINTRINSIC_KEY = -fno-builtin
LIBDL = -ldl
SDL_FLAGS = -fstack-protector -Wformat -Wformat-security
CPLUS = icpc
CONLY = icc
ifeq (release,$(cfg))
SDL_FLAGS += -D_FORTIFY_SOURCE=2
CPLUS_FLAGS = -O2 -g -DUSE_PTHREAD
else
CPLUS_FLAGS = -O0 -g -DUSE_PTHREAD -DTBB_USE_DEBUG
@@ -49,7 +50,7 @@ else
OPENMP_FLAG = -openmp
endif
LIB_LINK_FLAGS = -shared -static-intel -Wl,-soname=$(BUILDING_LIBRARY)
LIB_LINK_FLAGS = -shared -static-intel -Wl,-soname=$(BUILDING_LIBRARY) -z relro -z now
LIBS += -lpthread -lrt
C_FLAGS = $(CPLUS_FLAGS)
CILK_AVAILABLE = yes
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/bash
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
@echo off
REM
REM Copyright (c) 2005-2016 Intel Corporation
REM Copyright (c) 2005-2017 Intel Corporation
REM
REM Licensed under the Apache License, Version 2.0 (the "License");
REM you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -1
View File
@@ -1,6 +1,6 @@
#!/bin/sh
#
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
+1 -40
View File
@@ -1,4 +1,4 @@
// Copyright (c) 2005-2016 Intel Corporation
// Copyright (c) 2005-2017 Intel Corporation
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
@@ -93,42 +93,3 @@ WScript.echo( "#define __TBB_DATETIME \"" + date.toUTCString() + "\"" );
WScript.echo( "#define __TBB_VERSION_YMD " + date.getUTCFullYear() + ", " +
(date.getUTCMonth() > 8 ? (date.getUTCMonth()+1):("0"+(date.getUTCMonth()+1))) +
(date.getUTCDate() > 9 ? date.getUTCDate():("0"+date.getUTCDate())) );
/*
Original strings
#define __TBB_VERSION_STRINGS \
"TBB: BUILD_HOST\t\tvpolin-mobl1 (ia32)" ENDL \
"TBB: BUILD_OS\t\tMicrosoft Windows XP [Version 5.1.2600]" ENDL \
"TBB: BUILD_CL\t\tMicrosoft (R) 32-bit C/C++ Optimizing Compiler Version 13.10.3077 for 80x86" ENDL \
"TBB: BUILD_COMPILER\tIntel(R) C++ Compiler for 32-bit applications, Version 9.1 Build 20070109Z Package ID: W_CC_C_9.1.034 " ENDL \
"TBB: BUILD_TARGET\t" ENDL \
"TBB: BUILD_COMMAND\t" ENDL \
#define __TBB_DATETIME "Mon Jun 4 10:16:07 UTC 2007"
#define __TBB_VERSION_YMD 2007, 0604
# The script must be run from two directory levels below this level.
x='"TBB: '
y='" ENDL \'
echo "#define __TBB_VERSION_STRINGS \\"
echo $x "BUILD_HOST\t\t"`hostname`" ("`../../arch.exe`")"$y
echo $x "BUILD_OS\t\t"`../../win_version.bat|grep -i 'Version'`$y
echo >empty.cpp
echo $x "BUILD_CL\t\t"`cl -c empty.cpp 2>&1 | grep -i Version`$y
echo $x "BUILD_COMPILER\t"`icl -c empty.cpp 2>&1 | grep -i Version`$y
echo $x "BUILD_TARGET\t"$TBB_ARCH$y
echo $x "BUILD_COMMAND\t"$*$y
echo ""
# A workaround for MKS 8.6 where `date -u` crashes.
date -u > date.tmp
echo "#define __TBB_DATETIME \""`cat date.tmp`"\""
echo "#define __TBB_VERSION_YMD "`date '+%Y, %m%d'`
rm empty.cpp
rm empty.obj
rm date.tmp
*/
+1 -1
View File
@@ -20,7 +20,7 @@ This directory contains the Visual Studio* 2012 solution to build Intel&reg; Thr
<HR>
<A HREF="../index.html">Up to parent directory</A>
<P></P>
Copyright &copy; 2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2017 Intel Corporation. All Rights Reserved.
<P></P>
Intel is a registered trademark or trademark of Intel Corporation
or its subsidiaries in the United States and other countries.
+5 -4
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -33,13 +33,13 @@ ifneq (,$(stdver))
endif
ifeq ($(arch), ia32)
LIB_LINK_FLAGS += /SAFESEH
LIB_LINK_FLAGS += /SAFESEH
endif
ifeq ($(runtime), vc_mt)
MS_CRT_KEY = /MT$(if $(findstring debug,$(cfg)),d)
MS_CRT_KEY = /MT$(if $(findstring debug,$(cfg)),d)
else
MS_CRT_KEY = /MD$(if $(findstring debug,$(cfg)),d)
MS_CRT_KEY = /MD$(if $(findstring debug,$(cfg)),d)
endif
EH_FLAGS = /EHsc /GR
@@ -71,6 +71,7 @@ DEFINE_KEY = /D
OUTPUT_KEY = /Fe
OUTPUTOBJ_KEY = /Fo
WARNING_AS_ERROR_KEY = /WX
BIGOBJ_KEY = /bigobj
ifeq ($(runtime),vc7.1)
WARNING_KEY = /W3
+9 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -65,6 +65,7 @@ DYLIB_KEY = -shared
LIBDL =
EXPORT_KEY = -Wl,--version-script,
LIBS = -lpsapi
BIGOBJ_KEY = -Wa,-mbig-obj
#------------------------------------------------------------------------------
# End of compiler-specific variables
@@ -80,6 +81,13 @@ ifeq (ok,$(call detect_js,/minversion gcc 4.8))
RTM_KEY = -mrtm
endif
# gcc 6.0 and later have -flifetime-dse option that controls
# elimination of stores done outside the object lifetime
ifeq (ok,$(call detect_js,/minversion gcc 6.0))
# keep pre-contruction stores for zero initialization
DSE_KEY = -flifetime-dse=1
endif
ifeq ($(cfg), release)
CPLUS_FLAGS = -g -O2
endif
+2 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
@@ -81,6 +81,7 @@ DYLIB_KEY = /DLL
EXPORT_KEY = /DEF:
NODEFAULTLIB_KEY = /Zl
NOINTRINSIC_KEY = /Oi-
BIGOBJ_KEY = /bigobj
ifneq (,$(codecov))
+1 -1
View File
@@ -1,4 +1,4 @@
# Copyright (c) 2005-2016 Intel Corporation
# Copyright (c) 2005-2017 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
-85
View File
@@ -1,85 +0,0 @@
# Copyright (c) 2005-2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#
#
#
#------------------------------------------------------------------------------
# Define compiler-specific variables.
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# Setting compiler flags.
#------------------------------------------------------------------------------
CPLUS = cl /nologo
LINK_FLAGS = /link /nologo
LIB_LINK_FLAGS=/link /nologo /DLL /MAP /DEBUG
MS_CRT_KEY = /MT$(if $(findstring debug,$(cfg)),d)
EH_FLAGS = /EHsc /GR
ifeq ($(cfg), release)
CPLUS_FLAGS = $(MS_CRT_KEY) /O2 /Zi $(EH_FLAGS) /Zc:forScope /D_XBOX /DTBB_NO_LEGACY=1
ASM_FLAGS =
endif
ifeq ($(cfg), debug)
CPLUS_FLAGS = $(MS_CRT_KEY) /Od /Ob0 /Zi $(EH_FLAGS) /Zc:forScope \
/DTBB_USE_DEBUG /D_XBOX /DTBB_NO_LEGACY=1
ASM_FLAGS = /DUSE_FRAME_POINTER
endif
COMPILE_ONLY = /c
PREPROC_ONLY = /TP /EP
INCLUDE_KEY = /I
DEFINE_KEY = /D
OUTPUT_KEY = /Fe
OUTPUTOBJ_KEY = /Fo
WARNING_AS_ERROR_KEY = /WX
WARNING_KEY = /W3
DYLIB_KEY = /DLL
EXPORT_KEY = /DEF:
ifeq (em64t,$(arch))
CPLUS_FLAGS += /GS-
endif
CPLUS_FLAGS += /DUSE_WINTHREAD /D_CRT_SECURE_NO_DEPRECATE /D_WIN32_WINNT=$(_WIN32_WINNT)
C_FLAGS = $(CPLUS_FLAGS) /TC
#------------------------------------------------------------------------------
# End of setting compiler flags.
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# Setting assembler data.
#------------------------------------------------------------------------------
# nothing for XBOX360
#------------------------------------------------------------------------------
# End of setting assembler data.
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# Setting tbbmalloc data.
#------------------------------------------------------------------------------
M_CPLUS_FLAGS = $(subst $(EH_FLAGS),/EHs-,$(CPLUS_FLAGS))
#------------------------------------------------------------------------------
# End of setting tbbmalloc data.
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# End of define compiler-specific variables.
#------------------------------------------------------------------------------
-72
View File
@@ -1,72 +0,0 @@
# Copyright (c) 2005-2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#
#
#
ifdef tbb_build_dir
test_dir:=$(tbb_build_dir)
else
test_dir:=.
endif
# TODO give an error if archs doesn't match
ifndef arch
export arch:=xbox360
endif
ifndef runtime
export runtime:=xdk
endif
native_compiler := cl
export compiler ?= cl
debugger ?= devenv /debugexe
CMD=cmd /C
CWD=$(shell cmd /C echo %CD%)
RM=cmd /C del /Q /F
RD=cmd /C rmdir
MD=cmd /c mkdir
SLASH=\\
NUL = nul
OBJ = obj
DLL = dll
LIBEXT = lib
def_prefix = $(arch)
# Target Windows version. Do not increase beyond 0x0500 without prior discussion!
# Used as the value for macro definition option in compiler specific inc files.
_WIN32_WINNT=0x0400
TBB.LST =
TBB.DEF = $(tbb_root)/src/tbb/$(def_prefix)-tbb-export.def
TBB.DLL = tbb$(CPF_SUFFIX)$(DEBUG_SUFFIX).$(DLL)
TBB.LIB = tbb$(CPF_SUFFIX)$(DEBUG_SUFFIX).$(LIBEXT)
TBB.RES =
#On Windows we specify appropriate tbb library using #pragma comment
LINK_TBB.LIB =
MALLOC.DEF = $(MALLOC_ROOT)/$(def_prefix)-tbbmalloc-export.def
MALLOC.DLL = tbbmalloc$(DEBUG_SUFFIX).$(DLL)
MALLOC.LIB = tbbmalloc$(DEBUG_SUFFIX).$(LIBEXT)
#On Windows we specify appropriate tbbmalloc library using #pragma comment
LINK_MALLOC.LIB =
MALLOC.RES =
MAKE_VERSIONS = cmd /C cscript /nologo /E:jscript $(subst \,/,$(tbb_root))/build/version_info_windows.js $(compiler) $(arch) $(subst \,/,"$(VERSION_FLAGS)") > version_string.ver
MAKE_TBBVARS = cmd /C "$(subst /,\,$(tbb_root))\build\generate_tbbvars.bat"
+14 -7
View File
@@ -30,7 +30,7 @@ Hardware - Recommended
Intel(R) Core(TM) processor family or higher
Intel(R) Xeon(R) processor family or higher
Intel(R) Xeon Phi(TM) processor family
OS X* Systems
macOS* Systems
Intel(R) Core(TM) processor family or higher
Android* Systems
Intel(R) Atom(TM) processor family
@@ -70,11 +70,12 @@ Software - Supported Operating Systems
Intel(R) Cluster Ready
Red Hat* Enterprise Linux* 6, 7
SuSE* Linux* Enterprise Server 11, 12
Ubuntu* 12.04 LTS, 13.10, 14.04 LTS, 15.04, 16.04 LTS
Ubuntu* 12.04 LTS, 14.04 LTS, 15.04, 16.04 LTS
WindRiver* Linux 7
Yocto 1.7, 1.9 (2.0), 2.1
Systems with OS X* operating systems
Systems with OS X* or macOS* operating systems
OS X* 10.10 and higher
macOS* 10.12 and higher
Systems with Android* operating systems
Android* 5.x, 6.x
@@ -113,11 +114,17 @@ Library Issues
the -flifetime-dse=1 option to prevent crashes at runtime,
or use Intel(R) TBB makefiles that automatically set this option.
------------------------------------------------------------------------
(C) 2016 Intel Corporation
- The current implementation of gfx_factory does not allow memory
buffer objects to be used concurrently. As a result, several
streaming nodes customized with gfx_factory cannot be connected
with each other directly.
Intel, the Intel logo, Intel Core, Xeon, Xeon Phi and Pentium are
trademarks of Intel Corporation in the U.S. and/or other countries.
------------------------------------------------------------------------
(C) 2017 Intel Corporation
Intel, the Intel logo, Intel Core, Intel Atom, Xeon, Intel Xeon Phi and
Pentium are trademarks of Intel Corporation in the U.S. and/or other
countries.
* Other names and brands may be claimed as the property of others.
+1 -1
View File
@@ -50,7 +50,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+1 -1
View File
@@ -46,7 +46,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+1 -1
View File
@@ -48,7 +48,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+1 -1
View File
@@ -34,7 +34,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+1 -1
View File
@@ -50,7 +50,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+1 -1
View File
@@ -44,7 +44,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+1 -1
View File
@@ -48,7 +48,7 @@
</div></div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+2 -2
View File
@@ -34,7 +34,7 @@
</div><!-- top -->
<div class="header">
<div class="summary">
<a href="a00253.html">List of all members</a> </div>
<a href="a00260.html">List of all members</a> </div>
<div class="headertitle">
<div class="title">__TBB_malloc_proxy_caller Struct Reference</div> </div>
</div><!--header-->
@@ -45,7 +45,7 @@
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+4 -4
View File
@@ -33,14 +33,14 @@
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>interface5</b></li><li class="navelem"><a class="el" href="a00036.html">concurrent_hash_map</a></li><li class="navelem"><a class="el" href="a00009.html">accessor</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface5</b></li><li class="navelem"><a class="el" href="a00036.html">concurrent_hash_map</a></li><li class="navelem"><a class="el" href="a00009.html">accessor</a></li> </ul>
</div>
</div><!-- top -->
<div class="header">
<div class="summary">
<a href="#pub-types">Public Types</a> &#124;
<a href="#pub-methods">Public Member Functions</a> &#124;
<a href="a00346.html">List of all members</a> </div>
<a href="a00357.html">List of all members</a> </div>
<div class="headertitle">
<div class="title">tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::accessor Class Reference</div> </div>
</div><!--header-->
@@ -118,7 +118,7 @@ bool&#160;</td><td class="memItemRight" valign="bottom"><b>is_writer</b> ()</td>
<tr class="separator:a05b74d408d8cd7773f7b5edfef97da1b inherit pro_methods_a00047"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="inherit_header pro_attribs_a00047"><td colspan="2" onclick="javascript:toggleInherit('pro_attribs_a00047')"><img src="closed.png" alt="-"/>&#160;Protected Attributes inherited from <a class="el" href="a00047.html">tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::const_accessor</a></td></tr>
<tr class="memitem:ac9b96f45483ddbff95a95e8e666a8f28 inherit pro_attribs_a00047"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ac9b96f45483ddbff95a95e8e666a8f28"></a>
<a class="el" href="a00078.html">node</a> *&#160;</td><td class="memItemRight" valign="bottom"><b>my_node</b></td></tr>
<a class="el" href="a00083.html">node</a> *&#160;</td><td class="memItemRight" valign="bottom"><b>my_node</b></td></tr>
<tr class="separator:ac9b96f45483ddbff95a95e8e666a8f28 inherit pro_attribs_a00047"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:a5034084f595666b47734f99a6eaefa9f inherit pro_attribs_a00047"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="a5034084f595666b47734f99a6eaefa9f"></a>
hashcode_t&#160;</td><td class="memItemRight" valign="bottom"><b>my_hash</b></td></tr>
@@ -135,7 +135,7 @@ class tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::acce
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+3 -3
View File
@@ -33,13 +33,13 @@
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>interface5</b></li><li class="navelem"><a class="el" href="a00036.html">concurrent_hash_map</a></li><li class="navelem"><a class="el" href="a00010.html">accessor_not_used</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface5</b></li><li class="navelem"><a class="el" href="a00036.html">concurrent_hash_map</a></li><li class="navelem"><a class="el" href="a00010.html">accessor_not_used</a></li> </ul>
</div>
</div><!-- top -->
<div class="header">
<div class="summary">
<a href="#pub-methods">Public Member Functions</a> &#124;
<a href="a00347.html">List of all members</a> </div>
<a href="a00358.html">List of all members</a> </div>
<div class="headertitle">
<div class="title">tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::accessor_not_used Struct Reference</div> </div>
</div><!--header-->
@@ -57,7 +57,7 @@ void&#160;</td><td class="memItemRight" valign="bottom"><b>release</b> ()</td></
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+3 -3
View File
@@ -33,13 +33,13 @@
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><a class="el" href="a00011.html">aggregator</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><a class="el" href="a00011.html">aggregator</a></li> </ul>
</div>
</div><!-- top -->
<div class="header">
<div class="summary">
<a href="#pub-methods">Public Member Functions</a> &#124;
<a href="a00367.html">List of all members</a> </div>
<a href="a00378.html">List of all members</a> </div>
<div class="headertitle">
<div class="title">tbb::interface6::aggregator Class Reference</div> </div>
</div><!--header-->
@@ -116,7 +116,7 @@ template&lt;typename Body &gt; </div>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
+3 -3
View File
@@ -33,14 +33,14 @@
</div>
<div id="nav-path" class="navpath">
<ul>
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><a class="el" href="a00012.html">aggregator_ext</a></li> </ul>
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<div class="title">tbb::interface6::aggregator_ext&lt; handler_type &gt; Class Template Reference</div> </div>
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@@ -142,7 +142,7 @@ template&lt;typename handler_type&gt; </div>
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<hr>
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><a class="el" href="a00013.html">aggregator_operation</a></li> </ul>
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@@ -41,7 +41,7 @@
<a href="#pub-types">Public Types</a> &#124;
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<div class="title">tbb::interface6::aggregator_operation Class Reference</div> </div>
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@@ -120,7 +120,7 @@ template&lt;typename handler_type &gt; </td></tr>
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<hr>
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<div class="title">tbb::aligned_space&lt; T, N &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00255.html">Memory Allocation</a></div></div> </div>
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@@ -73,7 +73,7 @@ class tbb::aligned_space&lt; T, N &gt;</h3>
</div><!-- contents -->
<hr>
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<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><a class="el" href="a00015.html">atomic</a></li> </ul>
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<div class="title">tbb::atomic&lt; T &gt; Struct Template Reference<div class="ingroups"><a class="el" href="a00249.html">Synchronization</a></div></div> </div>
<div class="title">tbb::atomic&lt; T &gt; Struct Template Reference<div class="ingroups"><a class="el" href="a00256.html">Synchronization</a></div></div> </div>
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@@ -82,7 +82,7 @@ struct tbb::atomic&lt; T &gt;</h3>
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<hr>
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Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><a class="el" href="a00016.html">atomic< void * ></a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00016.html">atomic< void * ></a></li> </ul>
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<div class="title">tbb::atomic&lt; void * &gt; Struct Template Reference</div> </div>
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@@ -81,7 +81,7 @@ struct tbb::atomic&lt; void * &gt;</h3>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface7</b></li><li class="navelem"><a class="el" href="a00144.html">task_arena</a></li><li class="navelem"><a class="el" href="a00017.html">attach</a></li> </ul>
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@@ -54,7 +54,7 @@
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Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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@@ -72,7 +72,7 @@ const char *&#160;</td><td class="memItemRight" valign="bottom"><b>what</b> () c
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<hr>
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@@ -33,13 +33,13 @@
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00019.html">basic_handler</a></li> </ul>
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@@ -57,7 +57,7 @@ void&#160;</td><td class="memItemRight" valign="bottom"><b>operator()</b> (<a cl
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<hr>
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Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00020.html">basic_operation</a></li> </ul>
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<div class="title">tbb::interface6::internal::basic_operation&lt; Body &gt; Class Template Reference</div> </div>
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@@ -75,7 +75,7 @@ Additional Inherited Members</h2></td></tr>
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<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00021.html">basic_operation_base</a></li> </ul>
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<div class="title">tbb::interface6::internal::basic_operation_base Class Reference<span class="mlabels"><span class="mlabel">abstract</span></span></div> </div>
</div><!--header-->
@@ -89,7 +89,7 @@ void&#160;</td><td class="memItemRight" valign="bottom"><b>set_next</b> (<a clas
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00022.html">blocked_range</a></li> </ul>
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<div class="header">
@@ -42,9 +42,9 @@
<a href="#pub-methods">Public Member Functions</a> &#124;
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<div class="title">tbb::blocked_range&lt; Value &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00246.html">Algorithms</a></div></div> </div>
<div class="title">tbb::blocked_range&lt; Value &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00253.html">Algorithms</a></div></div> </div>
</div><!--header-->
<div class="contents">
@@ -316,7 +316,7 @@ template&lt;typename Value&gt; </div>
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<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00023.html">blocked_range2d</a></li> </ul>
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<div class="header">
@@ -41,9 +41,9 @@
<a href="#pub-types">Public Types</a> &#124;
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<div class="title">tbb::blocked_range2d&lt; RowValue, ColValue &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00246.html">Algorithms</a></div></div> </div>
<div class="title">tbb::blocked_range2d&lt; RowValue, ColValue &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00253.html">Algorithms</a></div></div> </div>
</div><!--header-->
<div class="contents">
@@ -115,7 +115,7 @@ class tbb::blocked_range2d&lt; RowValue, ColValue &gt;</h3>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00024.html">blocked_range3d</a></li> </ul>
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<div class="header">
@@ -41,9 +41,9 @@
<a href="#pub-types">Public Types</a> &#124;
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<div class="title">tbb::blocked_range3d&lt; PageValue, RowValue, ColValue &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00253.html">Algorithms</a></div></div> </div>
</div><!--header-->
<div class="contents">
@@ -122,7 +122,7 @@ class tbb::blocked_range3d&lt; PageValue, RowValue, ColValue &gt;</h3>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>flow</b></li><li class="navelem"><b>interface9</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00025.html">broadcast_cache</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>flow</b></li><li class="navelem"><b>interface9</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00025.html">broadcast_cache</a></li> </ul>
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@@ -42,12 +42,12 @@
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<hr/>The documentation for this class was generated from the following file:<ul>
<li><a class="el" href="a00184.html">flow_graph.h</a></li>
<li><a class="el" href="a00189.html">flow_graph.h</a></li>
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<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface5</b></li><li class="navelem"><a class="el" href="a00036.html">concurrent_hash_map</a></li><li class="navelem"><a class="el" href="a00026.html">bucket_accessor</a></li> </ul>
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<div class="title">tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::bucket_accessor Class Reference</div> </div>
</div><!--header-->
@@ -87,7 +87,7 @@ class tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::buck
</div><!-- contents -->
<hr>
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Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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@@ -41,9 +41,9 @@
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@@ -138,7 +138,7 @@ class tbb::cache_aligned_allocator&lt; T &gt;</h3>
</div><!-- contents -->
<hr>
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Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><a class="el" href="a00028.html">cache_aligned_allocator< void ></a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00028.html">cache_aligned_allocator< void ></a></li> </ul>
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<div class="title">tbb::cache_aligned_allocator&lt; void &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00248.html">Memory Allocation</a></div></div> </div>
<div class="title">tbb::cache_aligned_allocator&lt; void &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00255.html">Memory Allocation</a></div></div> </div>
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@@ -53,7 +53,7 @@
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a>
Classes</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="a00112.html">rebind</a></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="a00118.html">rebind</a></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="pub-types"></a>
@@ -79,7 +79,7 @@ class tbb::cache_aligned_allocator&lt; void &gt;</h3>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface5</b></li><li class="navelem"><a class="el" href="a00036.html">concurrent_hash_map</a></li><li class="navelem"><a class="el" href="a00029.html">call_clear_on_leave</a></li> </ul>
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<div class="title">tbb::interface5::concurrent_hash_map&lt; Key, T, HashCompare, A &gt;::call_clear_on_leave Struct Reference</div> </div>
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@@ -67,7 +67,7 @@ Public Attributes</h2></td></tr>
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<hr>
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Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
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Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>flow</b></li><li class="navelem"><b>interface9</b></li><li class="navelem"><a class="el" href="a00030.html">callback</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>flow</b></li><li class="navelem"><b>interface9</b></li><li class="navelem"><a class="el" href="a00030.html">callback</a></li> </ul>
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<div class="title">tbb::flow::interface9::callback&lt; Callback, T &gt; Class Template Reference</div> </div>
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@@ -69,7 +69,7 @@ void&#160;</td><td class="memItemRight" valign="bottom"><b>call</b> () __TBB_ove
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<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
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<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>flow</b></li><li class="navelem"><b>interface9</b></li><li class="navelem"><a class="el" href="a00031.html">callback_base</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>flow</b></li><li class="navelem"><b>interface9</b></li><li class="navelem"><a class="el" href="a00031.html">callback_base</a></li> </ul>
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<div class="title">tbb::flow::interface9::callback_base Class Reference<span class="mlabels"><span class="mlabel">abstract</span></span></div> </div>
</div><!--header-->
@@ -66,7 +66,7 @@ virtual void&#160;</td><td class="memItemRight" valign="bottom"><b>call</b> ()=0
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
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@@ -33,13 +33,13 @@
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><a class="el" href="a00032.html">captured_exception</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00032.html">captured_exception</a></li> </ul>
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<div class="headertitle">
<div class="title">tbb::captured_exception Class Reference</div> </div>
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@@ -55,7 +55,7 @@ Inheritance diagram for tbb::captured_exception:</div>
<div class="center">
<img src="a00032.png" usemap="#tbb::captured_exception_map" alt=""/>
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<table class="memberdecls">
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void __TBB_EXPORTED_METHOD&#160;</td><td class="memItemRight" valign="bottom"><b>clear</b> () throw ()</td></tr>
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<tr class="inherit_header pub_methods_a00150"><td colspan="2" onclick="javascript:toggleInherit('pub_methods_a00150')"><img src="closed.png" alt="-"/>&#160;Public Member Functions inherited from <a class="el" href="a00150.html">tbb::tbb_exception</a></td></tr>
<tr class="memitem:a6a973c37078afedf7d457ff4704bf8cd inherit pub_methods_a00150"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="a00150.html#a6a973c37078afedf7d457ff4704bf8cd">operator delete</a> (void *p)</td></tr>
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<tr class="inherit_header pub_methods_a00155"><td colspan="2" onclick="javascript:toggleInherit('pub_methods_a00155')"><img src="closed.png" alt="-"/>&#160;Public Member Functions inherited from <a class="el" href="a00155.html">tbb::tbb_exception</a></td></tr>
<tr class="memitem:a6a973c37078afedf7d457ff4704bf8cd inherit pub_methods_a00155"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="a00155.html#a6a973c37078afedf7d457ff4704bf8cd">operator delete</a> (void *p)</td></tr>
<tr class="separator:a6a973c37078afedf7d457ff4704bf8cd inherit pub_methods_a00155"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
<div class="textblock"><p>This class is used by TBB to propagate information about unhandled exceptions into the root thread. </p>
<p>Exception of this type is thrown by TBB in the root thread (thread that started a parallel algorithm ) if an unhandled exception was intercepted during the algorithm execution in one of the workers. </p>
<dl class="section see"><dt>See Also</dt><dd><a class="el" href="a00150.html" title="Interface to be implemented by all exceptions TBB recognizes and propagates across the threads...">tbb::tbb_exception</a> </dd></dl>
<dl class="section see"><dt>See Also</dt><dd><a class="el" href="a00155.html" title="Interface to be implemented by all exceptions TBB recognizes and propagates across the threads...">tbb::tbb_exception</a> </dd></dl>
</div><h2 class="groupheader">Member Function Documentation</h2>
<a class="anchor" id="abfc1220a6f9da0361082a3f3ad80cdc9"></a>
<div class="memitem">
@@ -133,7 +133,7 @@ void __TBB_EXPORTED_METHOD&#160;</td><td class="memItemRight" valign="bottom"><b
<p>Destroys objects created by the <a class="el" href="a00032.html#a3b75205c631b51a00faf98c9e107f78a" title="Creates and returns pointer to the deep copy of this exception object. ">move()</a> method. </p>
<p>Frees memory and calls destructor for this exception object. Can and must be used only on objects created by the move method. </p>
<p>Implements <a class="el" href="a00150.html#ad3bc09bf78c33f19a0bcdf882fdf9d41">tbb::tbb_exception</a>.</p>
<p>Implements <a class="el" href="a00155.html#ad3bc09bf78c33f19a0bcdf882fdf9d41">tbb::tbb_exception</a>.</p>
</div>
</div>
@@ -167,7 +167,7 @@ void __TBB_EXPORTED_METHOD&#160;</td><td class="memItemRight" valign="bottom"><b
<p>Creates and returns pointer to the deep copy of this exception object. </p>
<p>Move semantics is allowed. </p>
<p>Implements <a class="el" href="a00150.html#a4bd4ba0d501021013d1473d21b020b69">tbb::tbb_exception</a>.</p>
<p>Implements <a class="el" href="a00155.html#a4bd4ba0d501021013d1473d21b020b69">tbb::tbb_exception</a>.</p>
</div>
</div>
@@ -195,7 +195,7 @@ void __TBB_EXPORTED_METHOD&#160;</td><td class="memItemRight" valign="bottom"><b
<p>Throws this exception object. </p>
<p>Make sure that if you have several levels of derivation from this interface you implement or override this method on the most derived level. The implementation is as simple as "throw *this;". Failure to do this will result in exception of a base class type being thrown. </p>
<p>Implements <a class="el" href="a00150.html#ae45c08d36c7ec7ae91785da3515a8828">tbb::tbb_exception</a>.</p>
<p>Implements <a class="el" href="a00155.html#ae45c08d36c7ec7ae91785da3515a8828">tbb::tbb_exception</a>.</p>
</div>
</div>
@@ -205,7 +205,7 @@ void __TBB_EXPORTED_METHOD&#160;</td><td class="memItemRight" valign="bottom"><b
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
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@@ -33,15 +33,15 @@
</div>
<div id="nav-path" class="navpath">
<ul>
<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><a class="el" href="a00033.html">combinable</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00033.html">combinable</a></li> </ul>
</div>
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<div class="title">tbb::combinable&lt; T &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00247.html">Containers</a></div></div> </div>
<div class="title">tbb::combinable&lt; T &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00254.html">Containers</a></div></div> </div>
</div><!--header-->
<div class="contents">
@@ -101,7 +101,7 @@ class tbb::combinable&lt; T &gt;</h3>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
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</div>
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<li class="navelem"><a class="el" href="a00228.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00034.html">concrete_filter</a></li> </ul>
<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><b>interface6</b></li><li class="navelem"><b>internal</b></li><li class="navelem"><a class="el" href="a00034.html">concrete_filter</a></li> </ul>
</div>
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@@ -47,7 +47,7 @@
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<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its
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@@ -33,7 +33,7 @@
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<li class="navelem"><a class="el" href="a00234.html">tbb</a></li><li class="navelem"><a class="el" href="a00035.html">concurrent_bounded_queue</a></li> </ul>
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@@ -42,9 +42,9 @@
<a href="#pub-types">Public Types</a> &#124;
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<a href="#friends">Friends</a> &#124;
<a href="a00266.html">List of all members</a> </div>
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<div class="title">tbb::concurrent_bounded_queue&lt; T, A &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00247.html">Containers</a></div></div> </div>
<div class="title">tbb::concurrent_bounded_queue&lt; T, A &gt; Class Template Reference<div class="ingroups"><a class="el" href="a00254.html">Containers</a></div></div> </div>
</div><!--header-->
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@@ -402,7 +402,7 @@ template&lt;typename T , class A = cache_aligned_allocator&lt;T&gt;&gt; </div>
</div><!-- contents -->
<hr>
<p></p>
Copyright &copy; 2005-2016 Intel Corporation. All Rights Reserved.
Copyright &copy; 2005-2017 Intel Corporation. All Rights Reserved.
<p></p>
Intel, Pentium, Intel Xeon, Itanium, Intel XScale and VTune are
registered trademarks or trademarks of Intel Corporation or its

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