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CPU: remove oneDNN

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This commit is contained in:
Attila Afra
2025-12-20 15:42:46 +02:00
parent ef05b6d91a
commit d2bd32a846
20 changed files with 13 additions and 1230 deletions
Download Patch File Download Diff File Expand all files Collapse all files
.github/workflows/internal.ci.yml
-48
View File
@@ -270,17 +270,6 @@ jobs:
artifact-out: build-rockylinux8-gcc-minimal
artifact-path: build install deps
build-rockylinux8-gcc-onednn:
secrets: inherit
uses: intel-innersource/libraries.devops.renderkit.workflows/.github/workflows/docker.yml@main
with:
project: oidn
image: oidn/rockylinux:8.8
dpcpp-version: intel-llvm/v6.0.1-rk
cmd: scripts/build.py install --compiler gcc -D OIDN_DEVICE_CPU_ONEDNN=ON
artifact-out: build-rockylinux8-gcc-onednn
artifact-path: build install deps
build-rockylinux8-gta-aotjit:
secrets: inherit
uses: intel-innersource/libraries.devops.renderkit.workflows/.github/workflows/docker.yml@main
@@ -754,20 +743,6 @@ jobs:
artifact-on-failure: true
cmd: scripts/test.py --device cpu --log test.log
test-rockylinux8-gcc-onednn-avx2:
needs: build-rockylinux8-gcc-onednn
secrets: inherit
uses: intel-innersource/libraries.devops.renderkit.workflows/.github/workflows/docker.yml@main
with:
project: oidn
runs-on: '[ "Linux", "avx2" ]'
image: oidn/rockylinux:8.8
artifact-in: build-rockylinux8-gcc-onednn
artifact-out: test-rockylinux8-gcc-onednn-avx2
artifact-path: test.log
artifact-on-failure: true
cmd: scripts/test.py --device cpu --log test.log
test-ubuntu2204-clang-asan:
needs: build-ubuntu2204-clang-asan
secrets: inherit
@@ -1433,16 +1408,6 @@ jobs:
runs-on: '[ "Windows", "build" ]'
cmd: python scripts/build.py --compiler msvc17 -D OIDN_LIBRARY_NAME=OIDN -D OIDN_API_NAMESPACE=myoidn
build-windows-msvc17-onednn:
secrets: inherit
uses: intel-innersource/libraries.devops.renderkit.workflows/.github/workflows/windows.yml@main
with:
project: oidn
runs-on: '[ "Windows", "build" ]'
artifact-out: build-windows-msvc17-onednn
artifact-path: build install
cmd: python scripts/build.py install --compiler msvc17 -D OIDN_DEVICE_CPU_ONEDNN=ON
build-windows-msvc17-asan:
secrets: inherit
uses: intel-innersource/libraries.devops.renderkit.workflows/.github/workflows/windows.yml@main
@@ -1580,19 +1545,6 @@ jobs:
artifact-on-failure: true
cmd: python scripts/test.py --device cpu --log test.log
test-windows-msvc17-onednn-avx512:
needs: build-windows-msvc17-onednn
secrets: inherit
uses: intel-innersource/libraries.devops.renderkit.workflows/.github/workflows/windows.yml@main
with:
project: oidn
runs-on: '[ "Windows", "avx512", "NAS" ]'
artifact-in: build-windows-msvc17-onednn
artifact-out: test-windows-msvc17-onednn-avx512
artifact-path: test.log
artifact-on-failure: true
cmd: python scripts/test.py --device cpu --minimal --log test.log
# FIXME: ASAN not on the path?
# test-windows-msvc17-asan-avx2:
# needs: build-windows-msvc17-asan
.gitmodules
-3
View File
@@ -1,6 +1,3 @@
[submodule "mkl-dnn"]
path = external/mkl-dnn
url = ../mkl-dnn.git
[submodule "weights"]
path = weights
url = ../oidn-weights.git
CMakeLists.txt
-1
View File
@@ -134,7 +134,6 @@ install(
${PROJECT_SOURCE_DIR}/CHANGELOG.md
${PROJECT_SOURCE_DIR}/third-party-programs.txt
${PROJECT_SOURCE_DIR}/third-party-programs-DPCPP.txt
${PROJECT_SOURCE_DIR}/third-party-programs-oneDNN.txt
${PROJECT_SOURCE_DIR}/third-party-programs-oneTBB.txt
DESTINATION ${CMAKE_INSTALL_DOCDIR}
COMPONENT lib
cmake/oidn_dnnl.cmake
-166
View File
@@ -1,166 +0,0 @@
## Copyright 2018 Intel Corporation
## SPDX-License-Identifier: Apache-2.0
set(DNNL_SOURCE_DIR "${PROJECT_SOURCE_DIR}/external/mkl-dnn")
set(DNNL_BINARY_DIR "${PROJECT_BINARY_DIR}/external/mkl-dnn")
set(DNNL_VERSION_MAJOR 3)
set(DNNL_VERSION_MINOR 0)
set(DNNL_VERSION_PATCH 1)
set(DNNL_VERSION_HASH "N/A")
set(DNNL_CPU_RUNTIME "TBB")
set(DNNL_CPU_THREADING_RUNTIME "TBB")
set(DNNL_GPU_RUNTIME "NONE")
option(DNNL_ENABLE_JIT_PROFILING
"Enable registration of oneDNN kernels that are generated at runtime with
VTune Amplifier. Without the registrations, VTune Amplifier would report
data collected inside the kernels as `outside any known module`."
OFF)
mark_as_advanced(DNNL_ENABLE_JIT_PROFILING)
option(DNNL_ENABLE_ITT_TASKS
"Enable ITT Tasks tagging feature and tag all primitive execution. VTune
Amplifier can group profiling results based on those ITT tasks and show
corresponding timeline information."
OFF)
mark_as_advanced(DNNL_ENABLE_ITT_TASKS)
set(BUILD_INFERENCE TRUE)
set(BUILD_CONVOLUTION TRUE)
set(BUILD_PRIMITIVE_CPU_ISA_ALL TRUE)
configure_file(
"${DNNL_SOURCE_DIR}/include/oneapi/dnnl/dnnl_config.h.in"
"${DNNL_BINARY_DIR}/include/oneapi/dnnl/dnnl_config.h"
)
configure_file(
"${DNNL_SOURCE_DIR}/include/oneapi/dnnl/dnnl_version.h.in"
"${DNNL_BINARY_DIR}/include/oneapi/dnnl/dnnl_version.h"
)
file(GLOB DNNL_SOURCES
${DNNL_SOURCE_DIR}/src/common/*.[ch]pp
${DNNL_SOURCE_DIR}/src/cpu/jit_utils/*.[ch]pp
${DNNL_SOURCE_DIR}/src/cpu/x64/injectors/*.[ch]pp
${DNNL_SOURCE_DIR}/src/cpu/x64/xbyak/*.h
)
list(APPEND DNNL_SOURCES
${DNNL_SOURCE_DIR}/src/cpu/bfloat16.cpp
${DNNL_SOURCE_DIR}/src/cpu/binary_injector_utils.cpp
${DNNL_SOURCE_DIR}/src/cpu/binary_injector_utils.hpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_concat.cpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_convolution_list.cpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_convolution_pd.hpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_eltwise_pd.hpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_engine.cpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_engine.hpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_memory_storage.hpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_stream.hpp
${DNNL_SOURCE_DIR}/src/cpu/cpu_sum.cpp
${DNNL_SOURCE_DIR}/src/cpu/float16.cpp
${DNNL_SOURCE_DIR}/src/cpu/platform.cpp
${DNNL_SOURCE_DIR}/src/cpu/platform.hpp
${DNNL_SOURCE_DIR}/src/cpu/primitive_attr_postops.cpp
${DNNL_SOURCE_DIR}/src/cpu/primitive_attr_postops.hpp
${DNNL_SOURCE_DIR}/src/cpu/scale_utils.cpp
${DNNL_SOURCE_DIR}/src/cpu/scale_utils.hpp
${DNNL_SOURCE_DIR}/src/cpu/simple_q10n.hpp
${DNNL_SOURCE_DIR}/src/cpu/zero_point_utils.cpp
${DNNL_SOURCE_DIR}/src/cpu/zero_point_utils.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/amx_tile_configure.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/amx_tile_configure.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/cpu_barrier.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/cpu_barrier.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/cpu_isa_traits.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/cpu_isa_traits.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/cpu_reducer.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/cpu_reducer.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx2_conv_kernel_f32.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx2_conv_kernel_f32.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx2_convolution.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx2_convolution.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx512_common_convolution.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx512_common_convolution.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx512_common_conv_kernel.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_avx512_common_conv_kernel.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_generator.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_primitive_conf.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_sse41_conv_kernel_f32.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_sse41_conv_kernel_f32.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_sse41_convolution.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_sse41_convolution.hpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_transpose_utils.cpp
${DNNL_SOURCE_DIR}/src/cpu/x64/jit_transpose_utils.hpp
)
if(DNNL_ENABLE_JIT_PROFILING OR DNNL_ENABLE_ITT_TASKS)
file(GLOB ITT_SOURCES ${DNNL_SOURCE_DIR}/src/common/ittnotify/*.[ch])
list(APPEND DNNL_SOURCES ${ITT_SOURCES})
endif()
if(DNNL_ENABLE_JIT_PROFILING)
list(APPEND DNNL_SOURCES
${DNNL_SOURCE_DIR}/src/cpu/jit_utils/linux_perf/linux_perf.cpp
${DNNL_SOURCE_DIR}/src/cpu/jit_utils/linux_perf/linux_perf.hpp
)
endif()
if(MSVC)
if(CMAKE_CXX_COMPILER_ID STREQUAL "MSVC" OR CMAKE_CXX_COMPILER_ID STREQUAL "Intel")
set_source_files_properties(${DNNL_SOURCES} PROPERTIES COMPILE_FLAGS "/bigobj")
endif()
endif()
add_library(dnnl STATIC ${DNNL_SOURCES})
target_include_directories(dnnl
PUBLIC
$<BUILD_INTERFACE:${DNNL_SOURCE_DIR}/include>
$<BUILD_INTERFACE:${DNNL_BINARY_DIR}/include>
$<BUILD_INTERFACE:${DNNL_SOURCE_DIR}/src>
$<BUILD_INTERFACE:${DNNL_SOURCE_DIR}/src/common>
$<BUILD_INTERFACE:${DNNL_SOURCE_DIR}/src/cpu>
$<BUILD_INTERFACE:${DNNL_SOURCE_DIR}/src/cpu/xbyak>
)
target_compile_definitions(dnnl
PUBLIC
-DDNNL_ENABLE_CONCURRENT_EXEC
)
set(DNNL_COMPILE_OPTIONS "")
if(WIN32 AND CMAKE_CXX_COMPILER_ID STREQUAL "Intel")
# Correct 'jnl' macro/jit issue
list(APPEND DNNL_COMPILE_OPTIONS "/Qlong-double")
endif()
target_compile_options(dnnl PRIVATE ${DNNL_COMPILE_OPTIONS})
target_link_libraries(dnnl
PUBLIC
${CMAKE_THREAD_LIBS_INIT}
TBB::tbb
)
if(DNNL_ENABLE_JIT_PROFILING OR DNNL_ENABLE_ITT_TASKS)
if(UNIX AND NOT APPLE)
# Not every compiler adds -ldl automatically
target_link_libraries(dnnl PUBLIC ${CMAKE_DL_LIBS})
endif()
endif()
if(DNNL_ENABLE_ITT_TASKS)
target_compile_definitions(dnnl PUBLIC -DDNNL_ENABLE_ITT_TASKS)
endif()
if(NOT DNNL_ENABLE_JIT_PROFILING)
target_compile_definitions(dnnl PUBLIC -DDNNL_ENABLE_JIT_PROFILING=0)
endif()
if(OIDN_STATIC_LIB)
install(TARGETS dnnl
EXPORT
OpenImageDenoise_Exports
ARCHIVE
DESTINATION ${CMAKE_INSTALL_LIBDIR} COMPONENT devel
)
endif()
devices/cpu/CMakeLists.txt
+3 -26
View File
@@ -16,15 +16,7 @@ if(NOT TBB_FOUND)
find_package(TBB ${OIDN_TBB_MIN_VERSION} REQUIRED tbb)
endif()
if(OIDN_ARCH STREQUAL "X64")
# oneDNN
option(OIDN_DEVICE_CPU_ONEDNN "Enable oneDNN for CPU device." OFF)
mark_as_advanced(OIDN_DEVICE_CPU_ONEDNN)
if(OIDN_DEVICE_CPU_ONEDNN)
set(OIDN_DNNL ON)
include(oidn_dnnl)
endif()
elseif(APPLE AND OIDN_ARCH STREQUAL "ARM64")
if(APPLE AND OIDN_ARCH STREQUAL "ARM64")
# BNNS
option(OIDN_DEVICE_CPU_BNNS "Enable BNNS for CPU device." ON)
mark_as_advanced(OIDN_DEVICE_CPU_BNNS)
@@ -88,18 +80,7 @@ set(OIDN_ISPC_SOURCES_COMMON
vec.isph
)
if(OIDN_DNNL)
list(APPEND OIDN_CPU_SOURCES
dnnl/dnnl_conv.h
dnnl/dnnl_conv.cpp
dnnl/dnnl_common.h
dnnl/dnnl_common.cpp
dnnl/dnnl_engine.h
dnnl/dnnl_engine.cpp
dnnl/dnnl_tensor.h
dnnl/dnnl_tensor.cpp
)
elseif(OIDN_BNNS)
if(OIDN_BNNS)
list(APPEND OIDN_CPU_SOURCES
bnns/bnns_common.h
bnns/bnns_common.cpp
@@ -139,11 +120,7 @@ if(OIDN_LIBRARY_VERSIONED)
set_target_properties(OpenImageDenoise_device_cpu PROPERTIES VERSION ${PROJECT_VERSION})
endif()
if(OIDN_DNNL)
target_compile_definitions(OpenImageDenoise_device_cpu PRIVATE OIDN_DNNL)
ispc_add_definitions(-DOIDN_DNNL)
target_link_libraries(OpenImageDenoise_device_cpu PRIVATE dnnl)
elseif(OIDN_BNNS)
if(OIDN_BNNS)
target_compile_definitions(OpenImageDenoise_device_cpu PRIVATE OIDN_BNNS)
ispc_add_definitions(-DOIDN_BNNS)
target_link_libraries(OpenImageDenoise_device_cpu PRIVATE "-framework Accelerate")
devices/cpu/cpu_common.cpp
+2 -2
View File
@@ -2,7 +2,7 @@
// SPDX-License-Identifier: Apache-2.0
#include "cpu_common.h"
#if !defined(OIDN_DNNL) && !defined(OIDN_BNNS)
#if !defined(OIDN_BNNS)
#include "cpu_conv_ispc.h"
#if defined(OIDN_ARCH_X64)
#include "cpu_conv_amx_ispc.h"
@@ -89,7 +89,7 @@ OIDN_NAMESPACE_BEGIN
}
#endif
#if !defined(OIDN_DNNL) && !defined(OIDN_BNNS)
#if !defined(OIDN_BNNS)
Tensor::operator ispc::TensorAccessor1D()
{
if (layout != TensorLayout::x)
devices/cpu/cpu_device.cpp
+2 -19
View File
@@ -4,9 +4,7 @@
#include "cpu_device.h"
#include "platform_ispc.h"
#if defined(OIDN_DNNL)
#include "dnnl/dnnl_engine.h"
#elif defined(OIDN_BNNS)
#if defined(OIDN_BNNS)
#include "bnns/bnns_engine.h"
#else
#include "cpu_engine.h"
@@ -151,22 +149,7 @@ OIDN_NAMESPACE_BEGIN
std::unique_ptr<CPUEngine> engine;
#if defined(OIDN_DNNL)
if (arch == CPUArch::AVX512)
{
tensorLayout = TensorLayout::Chw16c;
weightLayout = TensorLayout::OIhw16i16o;
tensorBlockC = 16;
}
else
{
tensorLayout = TensorLayout::Chw8c;
weightLayout = TensorLayout::OIhw8i8o;
tensorBlockC = 8;
}
engine.reset(new DNNLEngine(this, numThreads));
#elif defined(OIDN_BNNS)
#if defined(OIDN_BNNS)
tensorLayout = TensorLayout::chw;
weightLayout = TensorLayout::oihw;
tensorBlockC = 1;
devices/cpu/cpu_device.h
-3
View File
@@ -33,7 +33,6 @@ OIDN_NAMESPACE_BEGIN
class CPUDevice final : public Device
{
friend class CPUEngine;
friend class DNNLEngine;
public:
static std::vector<Ref<PhysicalDevice>> getPhysicalDevices();
@@ -44,9 +43,7 @@ OIDN_NAMESPACE_BEGIN
DeviceType getType() const override { return DeviceType::CPU; }
#if !defined(OIDN_DNNL)
bool needWeightAndBiasOnDevice() const override { return false; } // no need to copy
#endif
Storage getPtrStorage(const void* ptr) override;
int getInt(const std::string& name) override;
devices/cpu/cpu_engine.cpp
+2 -2
View File
@@ -3,7 +3,7 @@
#include "core/conv.h"
#include "cpu_engine.h"
#if !defined(OIDN_DNNL) && !defined(OIDN_BNNS)
#if !defined(OIDN_BNNS)
#include "cpu_conv.h"
#if defined(OIDN_ARCH_X64)
#include "cpu_conv_amx.h"
@@ -75,7 +75,7 @@ OIDN_NAMESPACE_BEGIN
return postOp == PostOp::None;
}
#if !defined(OIDN_DNNL) && !defined(OIDN_BNNS)
#if !defined(OIDN_BNNS)
Ref<Conv> CPUEngine::newConv(const ConvDesc& desc)
{
#if defined(OIDN_ARCH_X64)
devices/cpu/cpu_engine.h
+1 -1
View File
@@ -24,7 +24,7 @@ OIDN_NAMESPACE_BEGIN
// Ops
bool isConvSupported(PostOp postOp) override;
#if !defined(OIDN_DNNL) && !defined(OIDN_BNNS)
#if !defined(OIDN_BNNS)
Ref<Conv> newConv(const ConvDesc& desc) override;
#endif
Ref<Pool> newPool(const PoolDesc& desc) override;
devices/cpu/dnnl/dnnl_common.cpp
-94
View File
@@ -1,94 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#include "dnnl_common.h"
#include "dnnl_tensor.h"
OIDN_NAMESPACE_BEGIN
dnnl::memory::data_type toDNNL(DataType dataType)
{
switch (dataType)
{
case DataType::Float32:
return dnnl::memory::data_type::f32;
case DataType::Float16:
return dnnl::memory::data_type::f16;
case DataType::UInt8:
return dnnl::memory::data_type::u8;
default:
throw std::invalid_argument("unsupported data type");
}
}
dnnl::memory::desc toDNNL(const TensorDesc& td)
{
dnnl::memory::dims dnnlDims;
dnnl::memory::format_tag dnnlFormat;
switch (td.layout)
{
case TensorLayout::x:
assert(td.getRank() == 1);
dnnlDims = {td.getPaddedX()};
dnnlFormat = dnnl::memory::format_tag::x;
break;
case TensorLayout::chw:
assert(td.getRank() == 3);
dnnlDims = {1, td.getPaddedC(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::nchw;
break;
case TensorLayout::Chw8c:
assert(td.getRank() == 3);
dnnlDims = {1, td.getPaddedC(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::nChw8c;
break;
case TensorLayout::Chw16c:
assert(td.getRank() == 3);
dnnlDims = {1, td.getPaddedC(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::nChw16c;
break;
case TensorLayout::oihw:
assert(td.getRank() == 4);
dnnlDims = {td.getPaddedO(), td.getPaddedI(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::oihw;
break;
case TensorLayout::OIhw8i8o:
assert(td.getRank() == 4);
dnnlDims = {td.getPaddedO(), td.getPaddedI(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::OIhw8i8o;
break;
case TensorLayout::OIhw16i16o:
assert(td.getRank() == 4);
dnnlDims = {td.getPaddedO(), td.getPaddedI(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::OIhw16i16o;
break;
case TensorLayout::OIhw2o8i8o2i:
assert(td.getRank() == 4);
dnnlDims = {td.getPaddedO(), td.getPaddedI(), td.getH(), td.getW()};
dnnlFormat = dnnl::memory::format_tag::OIhw2o8i8o2i;
break;
default:
throw std::invalid_argument("unsupported tensor layout");
}
return dnnl::memory::desc(dnnlDims, toDNNL(td.dataType), dnnlFormat);
}
dnnl::memory toDNNL(const Ref<Buffer>& buffer)
{
DNNLEngine* engine = dynamic_cast<DNNLEngine*>(buffer->getEngine());
if (!engine)
throw std::logic_error("buffer does not belong to a DNNL engine");
dnnl::memory::desc desc({int64_t(buffer->getByteSize())}, dnnl::memory::data_type::u8, dnnl::memory::format_tag::x);
return {desc, engine->getDNNLEngine(), buffer->getPtr()};
}
const dnnl::memory& getDNNL(const Ref<Tensor>& tensor)
{
if (auto dnnlTensor = dynamic_cast<const DNNLTensor*>(tensor.get()))
return dnnlTensor->getDNNLMemory();
else
throw std::invalid_argument("not DNNLTensor");
}
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_common.h
-20
View File
@@ -1,20 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#pragma once
#include "core/tensor.h"
#include "dnnl_engine.h"
OIDN_NAMESPACE_BEGIN
dnnl::memory::data_type toDNNL(DataType dataType);
dnnl::memory::desc toDNNL(const TensorDesc& td);
// Creates a DNNL memory structure for a buffer
dnnl::memory toDNNL(const Ref<Buffer>& buffer);
// Returns the internal DNNL memory structure of a DNNLTensor
const dnnl::memory& getDNNL(const Ref<Tensor>& tensor);
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_conv.cpp
-87
View File
@@ -1,87 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#include "dnnl_conv.h"
#include "dnnl_tensor.h"
OIDN_NAMESPACE_BEGIN
DNNLConv::DNNLConv(DNNLEngine* engine, const ConvDesc& desc)
: Conv(desc),
engine(engine)
{
const dnnl::memory::dims strides = {1, 1};
const dnnl::memory::dims padding = {1, 1};
// Incorporate activation
dnnl::primitive_attr attr;
if (activation == Activation::ReLU)
{
dnnl::post_ops ops;
ops.append_eltwise(
dnnl::algorithm::eltwise_relu,
0.f, // alpha
0.f // beta
);
attr.set_post_ops(ops);
}
attr.set_scratchpad_mode(dnnl::scratchpad_mode::user);
primDesc = dnnl::convolution_forward::primitive_desc(
engine->getDNNLEngine(),
dnnl::prop_kind::forward_inference, dnnl::algorithm::convolution_direct,
toDNNL(srcDesc),
toDNNL(weightDesc),
toDNNL(biasDesc),
toDNNL(dstDesc),
strides, padding, padding,
attr);
}
size_t DNNLConv::getScratchByteSize()
{
return primDesc.scratchpad_desc().get_size();
}
void DNNLConv::setScratch(const Ref<Buffer>& scratch)
{
this->scratch = scratch;
args[DNNL_ARG_SCRATCHPAD] = toDNNL(scratch);
}
void DNNLConv::updateSrc()
{
args[DNNL_ARG_SRC] = getDNNL(src);
}
void DNNLConv::updateWeight()
{
args[DNNL_ARG_WEIGHTS] = getDNNL(weight);
}
void DNNLConv::updateBias()
{
args[DNNL_ARG_BIAS] = getDNNL(bias);
}
void DNNLConv::updateDst()
{
args[DNNL_ARG_DST] = getDNNL(dst);
}
void DNNLConv::finalize()
{
prim = dnnl::convolution_forward(primDesc);
}
void DNNLConv::submitKernels(const Ref<CancellationToken>& ct)
{
if (!prim)
throw std::logic_error("convolution not finalized");
if (!src || !dst || !weight || !bias)
throw std::logic_error("convolution source/weight/bias/destination not set");
engine->submitFunc([=] { prim.execute(engine->getDNNLStream(), args); }, ct);
}
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_conv.h
-37
View File
@@ -1,37 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#pragma once
#include "core/conv.h"
#include "dnnl_common.h"
OIDN_NAMESPACE_BEGIN
class DNNLConv final : public Conv
{
public:
DNNLConv(DNNLEngine* engine, const ConvDesc& desc);
Engine* getEngine() const override { return engine; }
size_t getScratchByteSize() override;
void setScratch(const Ref<Buffer>& scratch) override;
void finalize() override;
void submitKernels(const Ref<CancellationToken>& ct) override;
private:
void updateSrc() override;
void updateWeight() override;
void updateBias() override;
void updateDst() override;
DNNLEngine* engine;
dnnl::convolution_forward::primitive_desc primDesc;
dnnl::convolution_forward prim;
std::unordered_map<int, dnnl::memory> args;
Ref<Buffer> scratch;
};
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_engine.cpp
-41
View File
@@ -1,41 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#include "dnnl_engine.h"
#include "dnnl_tensor.h"
#include "dnnl_conv.h"
OIDN_NAMESPACE_BEGIN
DNNLEngine::DNNLEngine(CPUDevice* device, int numThreads)
: CPUEngine(device, numThreads)
{
dnnl_set_verbose(clamp(device->verbose - 2, 0, 2)); // unfortunately this is not per-device but global
dnnlEngine = dnnl::engine(dnnl::engine::kind::cpu, 0);
dnnlStream = dnnl::stream(dnnlEngine);
}
Ref<Tensor> DNNLEngine::newTensor(const TensorDesc& desc, Storage storage)
{
if (!isSupported(desc))
throw std::invalid_argument("unsupported tensor descriptor");
return makeRef<DNNLTensor>(this, desc, storage);
}
Ref<Tensor> DNNLEngine::newTensor(const Ref<Buffer>& buffer, const TensorDesc& desc, size_t byteOffset)
{
if (!isSupported(desc))
throw std::invalid_argument("unsupported tensor descriptor");
if (buffer->getEngine() != this)
throw std::invalid_argument("buffer was created by a different engine");
return makeRef<DNNLTensor>(buffer, desc, byteOffset);
}
Ref<Conv> DNNLEngine::newConv(const ConvDesc& desc)
{
return makeRef<DNNLConv>(this, desc);
}
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_engine.h
-30
View File
@@ -1,30 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#pragma once
#include "../cpu_engine.h"
#include "mkl-dnn/include/dnnl.hpp"
OIDN_NAMESPACE_BEGIN
class DNNLEngine final : public CPUEngine
{
public:
DNNLEngine(CPUDevice* device, int numThreads);
oidn_inline dnnl::engine& getDNNLEngine() { return dnnlEngine; }
oidn_inline dnnl::stream& getDNNLStream() { return dnnlStream; }
Ref<Tensor> newTensor(const TensorDesc& desc, Storage storage) override;
Ref<Tensor> newTensor(const Ref<Buffer>& buffer, const TensorDesc& desc, size_t byteOffset) override;
// Ops
Ref<Conv> newConv(const ConvDesc& desc) override;
private:
dnnl::engine dnnlEngine;
dnnl::stream dnnlStream;
};
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_tensor.cpp
-31
View File
@@ -1,31 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#include "dnnl_tensor.h"
OIDN_NAMESPACE_BEGIN
DNNLTensor::DNNLTensor(DNNLEngine* engine, const TensorDesc& desc, Storage storage)
: Tensor(engine->newBuffer(desc.getByteSize(), storage), desc)
{
mem = dnnl::memory(toDNNL(getDesc()), engine->getDNNLEngine(), buffer->getPtr());
}
DNNLTensor::DNNLTensor(const Ref<Buffer>& buffer, const TensorDesc& desc, size_t byteOffset)
: Tensor(buffer, desc, byteOffset)
{
if (byteOffset + getByteSize() > buffer->getByteSize())
throw Exception(Error::InvalidArgument, "buffer region is out of bounds");
mem = dnnl::memory(toDNNL(getDesc()),
static_cast<DNNLEngine*>(buffer->getEngine())->getDNNLEngine(),
static_cast<char*>(buffer->getPtr()) + byteOffset);
}
void DNNLTensor::postRealloc()
{
if (buffer)
mem.set_data_handle(static_cast<char*>(buffer->getPtr()) + byteOffset);
}
OIDN_NAMESPACE_END
devices/cpu/dnnl/dnnl_tensor.h
-27
View File
@@ -1,27 +0,0 @@
// Copyright 2018 Intel Corporation
// SPDX-License-Identifier: Apache-2.0
#pragma once
#include "core/tensor.h"
#include "dnnl_common.h"
OIDN_NAMESPACE_BEGIN
// Native DNNL tensor
class DNNLTensor final : public Tensor
{
public:
DNNLTensor(DNNLEngine* engine, const TensorDesc& desc, Storage storage);
DNNLTensor(const Ref<Buffer>& buffer, const TensorDesc& desc, size_t byteOffset);
void* getPtr() const override { return mem.get_data_handle(); }
const dnnl::memory& getDNNLMemory() const { return mem; }
private:
void postRealloc() override;
dnnl::memory mem;
};
OIDN_NAMESPACE_END
third-party-programs-oneDNN.txt
-583
View File
@@ -1,583 +0,0 @@
oneAPI Deep Neural Network Library (oneDNN) Third Party Programs File
This file contains the list of third party software ("third party programs")
contained in the Intel software and their required notices and/or license
terms. This third party software, even if included with the distribution of
the Intel software, may be governed by separate license terms, including
without limitation, third party license terms, other Intel software license
terms, and open source software license terms. These separate license terms
govern your use of the third party programs as set forth in in the
"THIRD-PARTY-PROGRAMS" file.
Third party programs and their corresponding required notices and/or license
terms are listed below.
--------------------------------------------------------------------------------
1. XByak (src/cpu/xbyak/)
Copyright (c) 2007 MITSUNARI Shigeo
All rights reserved.
3-Clause BSD License
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
Neither the name of the copyright owner nor the names of its contributors may
be used to endorse or promote products derived from this software without
specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGE.
ソースコード形式かバイナリ形式か、変更するかしないかを問わず、以下の条件を満た
す場合に限り、再頒布および使用が許可されます。
ソースコードを再頒布する場合、上記の著作権表示、本条件一覧、および下記免責条項
を含めること。
バイナリ形式で再頒布する場合、頒布物に付属のドキュメント等の資料に、上記の著作
権表示、本条件一覧、および下記免責条項を含めること。
書面による特別の許可なしに、本ソフトウェアから派生した製品の宣伝または販売促進
に、著作権者の名前またはコントリビューターの名前を使用してはならない。
本ソフトウェアは、著作権者およびコントリビューターによって「現状のまま」提供さ
れており、明示黙示を問わず、商業的な使用可能性、および特定の目的に対する適合性
に関する暗黙の保証も含め、またそれに限定されない、いかなる保証もありません。
著作権者もコントリビューターも、事由のいかんを問わず、 損害発生の原因いかんを
問わず、かつ責任の根拠が契約であるか厳格責任であるか（過失その他の）不法行為で
あるかを問わず、仮にそのような損害が発生する可能性を知らされていたとしても、
本ソフトウェアの使用によって発生した（代替品または代用サービスの調達、使用の
喪失、データの喪失、利益の喪失、業務の中断も含め、またそれに限定されない）直接
損害、間接損害、偶発的な損害、特別損害、懲罰的損害、または結果損害について、
一切責任を負わないものとします。
--------------------------------------------------------------------------------
2. Googletest (tests/gtests/gtest/)
Copyright 2005, Google Inc.
Copyright 2006, Google Inc.
Copyright 2007, Google Inc.
Copyright 2008, Google Inc.
Copyright 2015, Google Inc.
All rights reserved.
3-Clause BSD License
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above
copyright notice, this list of conditions and the following disclaimer
in the documentation and/or other materials provided with the
distribution.
* Neither the name of Google Inc. nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--------------------------------------------------------------------------------
3. Instrumentation and Tracing Technology API (src/common/ittnotify/)
Copyright (c) 2011, Intel Corporation. All rights reserved.
Copyright (c) 2005-2014 Intel Corporation. All rights reserved.
3-Clause BSD License
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
1. Redistributions of source code must retain the above copyright notice, this
list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright notice,
this list of conditions and the following disclaimer in the documentation
and/or other materials provided with the distribution.
3. Neither the name of Intel Corporation nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--------------------------------------------------------------------------------
4. CMake (cmake/FindOpenCL.cmake, cmake/FindBLAS.cmake, cmake/FindACL.cmake)
CMake - Cross Platform Makefile Generator
Copyright 2000-2020 Kitware, Inc. and Contributors
All rights reserved.
3-Clause BSD License
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
* Neither the name of Kitware, Inc. nor the names of Contributors
may be used to endorse or promote products derived from this
software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
------------------------------------------------------------------------------
The following individuals and institutions are among the Contributors:
* Aaron C. Meadows <cmake@shadowguarddev.com>
* Adriaan de Groot <groot@kde.org>
* Aleksey Avdeev <solo@altlinux.ru>
* Alexander Neundorf <neundorf@kde.org>
* Alexander Smorkalov <alexander.smorkalov@itseez.com>
* Alexey Sokolov <sokolov@google.com>
* Alex Merry <alex.merry@kde.org>
* Alex Turbov <i.zaufi@gmail.com>
* Andreas Pakulat <apaku@gmx.de>
* Andreas Schneider <asn@cryptomilk.org>
* André Rigland Brodtkorb <Andre.Brodtkorb@ifi.uio.no>
* Axel Huebl, Helmholtz-Zentrum Dresden - Rossendorf
* Benjamin Eikel
* Bjoern Ricks <bjoern.ricks@gmail.com>
* Brad Hards <bradh@kde.org>
* Christopher Harvey
* Christoph Grüninger <foss@grueninger.de>
* Clement Creusot <creusot@cs.york.ac.uk>
* Daniel Blezek <blezek@gmail.com>
* Daniel Pfeifer <daniel@pfeifer-mail.de>
* Enrico Scholz <enrico.scholz@informatik.tu-chemnitz.de>
* Eran Ifrah <eran.ifrah@gmail.com>
* Esben Mose Hansen, Ange Optimization ApS
* Geoffrey Viola <geoffrey.viola@asirobots.com>
* Google Inc
* Gregor Jasny
* Helio Chissini de Castro <helio@kde.org>
* Ilya Lavrenov <ilya.lavrenov@itseez.com>
* Insight Software Consortium <insightsoftwareconsortium.org>
* Jan Woetzel
* Julien Schueller
* Kelly Thompson <kgt@lanl.gov>
* Konstantin Podsvirov <konstantin@podsvirov.pro>
* Laurent Montel <montel@kde.org>
* Mario Bensi <mbensi@ipsquad.net>
* Martin Gräßlin <mgraesslin@kde.org>
* Mathieu Malaterre <mathieu.malaterre@gmail.com>
* Matthaeus G. Chajdas
* Matthias Kretz <kretz@kde.org>
* Matthias Maennich <matthias@maennich.net>
* Michael Hirsch, Ph.D. <www.scivision.co>
* Michael Stürmer
* Miguel A. Figueroa-Villanueva
* Mike Jackson
* Mike McQuaid <mike@mikemcquaid.com>
* Nicolas Bock <nicolasbock@gmail.com>
* Nicolas Despres <nicolas.despres@gmail.com>
* Nikita Krupen'ko <krnekit@gmail.com>
* NVIDIA Corporation <www.nvidia.com>
* OpenGamma Ltd. <opengamma.com>
* Patrick Stotko <stotko@cs.uni-bonn.de>
* Per Øyvind Karlsen <peroyvind@mandriva.org>
* Peter Collingbourne <peter@pcc.me.uk>
* Petr Gotthard <gotthard@honeywell.com>
* Philip Lowman <philip@yhbt.com>
* Philippe Proulx <pproulx@efficios.com>
* Raffi Enficiaud, Max Planck Society
* Raumfeld <raumfeld.com>
* Roger Leigh <rleigh@codelibre.net>
* Rolf Eike Beer <eike@sf-mail.de>
* Roman Donchenko <roman.donchenko@itseez.com>
* Roman Kharitonov <roman.kharitonov@itseez.com>
* Ruslan Baratov
* Sebastian Holtermann <sebholt@xwmw.org>
* Stephen Kelly <steveire@gmail.com>
* Sylvain Joubert <joubert.sy@gmail.com>
* The Qt Company Ltd.
* Thomas Sondergaard <ts@medical-insight.com>
* Tobias Hunger <tobias.hunger@qt.io>
* Todd Gamblin <tgamblin@llnl.gov>
* Tristan Carel
* University of Dundee
* Vadim Zhukov
* Will Dicharry <wdicharry@stellarscience.com>
See version control history for details of individual contributions.
The above copyright and license notice applies to distributions of
CMake in source and binary form. Third-party software packages supplied
with CMake under compatible licenses provide their own copyright notices
documented in corresponding subdirectories or source files.
------------------------------------------------------------------------------
CMake was initially developed by Kitware with the following sponsorship:
* National Library of Medicine at the National Institutes of Health
as part of the Insight Segmentation and Registration Toolkit (ITK).
* US National Labs (Los Alamos, Livermore, Sandia) ASC Parallel
Visualization Initiative.
* National Alliance for Medical Image Computing (NAMIC) is funded by the
National Institutes of Health through the NIH Roadmap for Medical Research,
Grant U54 EB005149.
* Kitware, Inc.
--------------------------------------------------------------------------------
5. Xbyak_aarch64 (src/cpu/aarch64/xbyak_aarch64/)
Copyright 2019-2020 FUJITSU LIMITED
Apache License, Version 2.0
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
Apache License
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http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
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6. Boost C++ Libraries (src/common/primitive_hashing.hpp)
Copyright 2005-2014 Daniel James.
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do so, all subject to the following:
The copyright notices in the Software and this entire statement, including
the above license grant, this restriction and the following disclaimer,
must be included in all copies of the Software, in whole or in part, and
all derivative works of the Software, unless such copies or derivative
works are solely in the form of machine-executable object code generated by
a source language processor.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
DEALINGS IN THE SOFTWARE.
--------------------------------------------------------------------------------
7. Intel(R) Graphics Compute Runtime for oneAPI Level Zero and OpenCL(TM)
Driver (src/gpu/jit/ngen/npack/{elf_structs,hash}.hpp)
Copyright (c) 2018 Intel Corporation
Intel(R) Graphics Compiler (src/gpu/jit/ngen/npack/neo_structs.hpp)
Copyright (c) 2019 Intel Corporation
oneAPI Level Zero (src/sycl/level_zero)
Copyright (C) 2019-2021 Intel Corporation
Doxyrest toolkit (doc/doxyrest/*)
Copyright (c) 2016, Tibbo Technology Inc
Copyright (c) 2016, Vladimir Gladkov
Copyright (c) 2016, Doxyrest maintainers
MIT License
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
8. Sphinx (doc/sphinx/conf/py)
Copyright (c) 2007-2021 by the Sphinx team (see AUTHORS file).
All rights reserved.
2-Clause BSD License
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:
* Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--------------------------------------------------------------------------------
9. Intel(R) Metrics Discovery Application Programming Interface (src/gpu/ocl/mdapi/metrics_discovery_api.h)
MIT License
Copyright (c) 2019, Intel Corporation
Permission is hereby granted, free of charge, to any person obtaining a
copy of this software and associated documentation files (the "Software"),
to deal in the Software without restriction, including without limitation
the rights to use, copy, modify, merge, publish, distribute, sublicense,
and/or sell copies of the Software, and to permit persons to whom the
Software is furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included
in all copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
IN THE SOFTWARE.
third-party-programs.txt
+3 -9
View File
@@ -14,10 +14,7 @@ terms are listed below.
--------------------------------------------------------------------------------
1. Intel(R) oneAPI Deep Neural Network Library (oneDNN)
Copyright 2016-2023 Intel Corporation
Intel(R) oneAPI Threading Building Blocks (oneTBB)
1. Intel(R) oneAPI Threading Building Blocks (oneTBB)
Copyright 2005-2023 Intel Corporation
Intel® Embree (snippets)
@@ -633,13 +630,10 @@ Software.
The following third party programs have their own third party programs. These
additional third party program files are as follows:
1. Intel(R) oneAPI Deep Neural Network Library (oneDNN)
./third-party-programs-oneDNN.txt
2. Intel(R) oneAPI Threading Building Blocks (oneTBB)
1. Intel(R) oneAPI Threading Building Blocks (oneTBB)
./third-party-programs-oneTBB.txt
3. oneAPI DPC++ Compiler
2. oneAPI DPC++ Compiler
./third-party-programs-DPCPP.txt
--------------------------------------------------------------------------------