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Remove gen9 targets

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This commit is contained in:
Arina Neshlyaeva
2025-11-21 17:42:57 -07:00
committed by aneshlya
parent d055a4fad5
commit 057d51aa94
65 changed files with 149 additions and 246 deletions
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.claude/skills/ispc-lit-tests/SKILL.md
+1 -1
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@@ -102,7 +102,7 @@ Defined in `tests/lit-tests/lit.cfg`:
Use `--debug-phase` to capture output of specific optimization passes:
```ispc
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text \
// RUN: %{ispc} %s --target=avx2 --emit-llvm-text \
// RUN: --debug-phase=325:325 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_325_LoadStoreVectorizerPass.ll %s
```
CMakeLists.txt
+1 -1
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@@ -396,7 +396,7 @@ endif()
list(APPEND ARM_TARGETS neon-i8x16 neon-i16x8 neon-i32x4 neon-i32x8 neon-i8x32 neon-i16x16)
list(APPEND RISCV_TARGETS rvv-x4)
list(APPEND WASM_TARGETS wasm-i32x4)
list(APPEND XE_TARGETS gen9-x16 gen9-x8 xelp-x16 xelp-x8 xehpg-x16 xehpg-x8 xehpc-x16 xehpc-x32 xelpg-x16 xelpg-x8
list(APPEND XE_TARGETS xelp-x16 xelp-x8 xehpg-x16 xehpg-x8 xehpc-x16 xehpc-x32 xelpg-x16 xelpg-x8
xe2hpg-x16 xe2hpg-x32 xe2lpg-x16 xe2lpg-x32)
if (X86_ENABLED)
README.md
+1 -1
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@@ -56,7 +56,7 @@ and optimization and is [hosted on github](http://github.com/ispc/ispc). It
supports Windows, macOS, and Linux as a host operating system and also capable
to target Android, iOS, and PS4/PS5. It currently supports multiple flavours
of x86 (SSE2, SSE4, AVX, AVX2, and AVX512), ARM (NEON), and Intel® GPU
architectures (Gen9 and Xe family).
architectures (Xe family).
## Features
cmake/CommonStdlibBuiltins.cmake
+1 -1
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@@ -59,7 +59,7 @@ function(determine_arch_and_os target bit os out_arch out_os)
else()
set(arch "error")
endif()
elseif ("${target}" MATCHES "gen9|xe")
elseif ("${target}" MATCHES "xe")
set(arch "xe64")
endif()
contrib/ispc.vim
+1 -1
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@@ -32,7 +32,7 @@ syn keyword ispcDefine ISPC ISPC_POINTER_SIZE ISPC_MAJOR_VERSION ISPC_MINOR_VER
\ F16_MIN FLT_MIN DBL_MIN F16_MAX FLT_MAX DBL_MAX
\ ISPC_TARGET_NEON ISPC_TARGET_SSE2 ISPC_TARGET_SSE4 ISPC_TARGET_AVX ISPC_TARGET_AVX2 ISPC_TARGET_AVX512KNL ISPC_TARGET_AVX512SKX
\ ISPC_TARGET_AVX512SPR ISPC_TARGET_AVX10_2
\ ISPC_TARGET_GEN9 ISPC_TARGET_XELP ISPC_TARGET_XEHPG ISPC_TARGET_XEHPC ISPC_TARGET_XELPG ISPC_TARGET_XE2HPG ISPC_TARGET_XE2LPG
\ ISPC_TARGET_XELP ISPC_TARGET_XEHPG ISPC_TARGET_XEHPC ISPC_TARGET_XELPG ISPC_TARGET_XE2HPG ISPC_TARGET_XE2LPG
" LLVM intrinsics are ISPC intrinsics
docs/design/invoke_sycl.rst
+2 -2
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@@ -21,7 +21,7 @@ Overview
The ``invoke_sycl`` adds support for an execution model in which SPMD functions are called from SIMD context. In
particular, below we will consider calling SYCL functions from ISPC. A similar approach may be applied to call between
other languages like call SYCL from ESIMD or call OpenCL from ISPC. ISPC execution model defines an execution width,
which is mapped to subgroup size in SYCL execution model. For example, ``gen9-x16`` target has an execution width 16,
which is mapped to subgroup size in SYCL execution model. For example, ``xehpg-x16`` target has an execution width 16,
so SYCL subgroup size will be 16 to match it. The invocation may be in both convergent and non-convergent contexts.
Defining SYCL function
@@ -96,7 +96,7 @@ Here is an example of calling SYCL function used in the examples above:
.. code-block:: cpp
// ispc --target=gen9-x16 simple.ispc
// ispc --target=xehpg-x16 simple.ispc
struct Parameters {
float *vin;
float *vout;
docs/ispc.rst
+7 -4
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@@ -940,8 +940,12 @@ functions from ISPC code will result in a **compilation error**.
Note: The compiler can only detect calls to exported functions within the same
compilation unit. Cross-module calls to exported functions cannot be detected.
``sse2-i32x4`` and ``sse2-i32x8`` targets are deprecated and will be removed in
future releases.
ISPC Targets:
* ``sse2-i32x4`` and ``sse2-i32x8`` targets are deprecated and will be removed in
future releases.
* ``gen9-x8``, and ``gen9-x16`` targets have been removed.
Getting Started with ISPC
=========================
@@ -1272,7 +1276,6 @@ The following GPU targets are supported:
============= ========================= ===========================================================
GPU target GPU microarchitecture First-GPU codename to support the target
============= ========================= ===========================================================
gen9 Intel Gen9 Intel Skylake iGPU (2015)
xelp Intel XeLP Intel Tiger Lake LP iGPU (2020)
xehpg Intel XeHPG Intel Arc Alchemist GPU (2022)
xehpc Intel XeHPC Intel Ponte Vecchio GPU (2022)
@@ -1348,7 +1351,7 @@ to ARMv8 (32-bit) when ``--arch=arm`` is used.
Xe targets:
``gen9-x8``, ``gen9-x16``, ``xelp-x8``, ``xelp-x16``, ``xehpg-x8``, ``xehpg-x16``, ``xehpc-x16``, ``xehpc-x32``.
``xelp-x8``, ``xelp-x16``, ``xehpg-x8``, ``xehpg-x16``, ``xehpc-x16``, ``xehpc-x32``.
Note that ``sse4.1`` and ``sse4.2`` targets may not be used together in
multi-target compilation. While the auto-dispatch code will correctly detect
docs/ispc_for_xe.rst
+7 -8
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@@ -45,11 +45,11 @@ Using The ISPC Compiler
=======================
The output from ``ispc`` for Xe targets is SPIR-V file by default. It is used
when either ``gen9`` or ``xe`` target is selected:
when ``xe`` target is selected:
.. code-block:: console
ispc foo.ispc --target=gen9-x8 -o foo.spv
ispc foo.ispc --target=xehpg-x8 -o foo.spv
The SPIR-V file is consumed by the runtime for further compilation and execution
on GPU.
@@ -82,16 +82,15 @@ installation of TBB runtime instructions.
Basic Command-line Options
--------------------------
A bunch of new targets were introduced for GPU support: ``gen9-x8``,
``gen9-x16``, ``xelp-x8``, ``xelp-x16``, ``xehpg-x8``, ``xehpg-x16``,
``xehpc-x16`` and ``xehpc-x32``.
A bunch of new targets were introduced for GPU support: ``xelp-x8``, ``xelp-x16``,
``xehpg-x8``, ``xehpg-x16``, ``xehpc-x16`` and ``xehpc-x32``.
If the ``-o`` flag is given, ``ispc`` will generate a SPIR-V output file.
Optionally you can use ``--emit-spirv`` flag:
.. code-block:: console
ispc --target=gen9-x8 --emit-spirv foo.ispc -o foo.spv
ispc --target=xehpg-x8 --emit-spirv foo.ispc -o foo.spv
To generate L0 binary, use ``--emit-zebin`` flag. When you use L0 binary you may
want to pass some additional options to the vector backend. You can do this
@@ -495,7 +494,7 @@ are example commands for Linux:
.. code-block:: console
ispc -I /home/ispc_package/include/ispcrt -DISPC_GPU --target=gen9-x8 --woff
ispc -I /home/ispc_package/include/ispcrt -DISPC_GPU --target=xehpg-x8 --woff
-o /home/ispc_package/examples/xpu/simple/xe_simple.spv
/home/ispc_package/examples/xpu/simple/simple.ispc
@@ -657,7 +656,7 @@ To reduce number of local variables you can follow these simple rules:
* Use SIMD-8 where it is impossible to fit in the available register number. If
you see the warning message below during runtime, consider compiling your code
for SIMD-8 target (``--target=gen9-x8``).
for SIMD-8 target (``--target=xehpg-x8``).
.. code-block:: console
examples/xpu/aobench/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2023, Intel Corporation
# Copyright (c) 2020-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "aobench")
set(ISPC_SRC_NAME "aobench.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(ISPC_TARGET_CPU "sse2-i32x8;sse4-i32x8;avx1-i32x8;avx2-i32x8;avx512skx-x8")
set(HOST_SOURCES ao.cpp ao_serial.cpp)
examples/xpu/mandelbrot/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2024, Intel Corporation
# Copyright (c) 2020-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "mandelbrot")
set(ISPC_SRC_NAME "mandelbrot.ispc")
set(ISPC_TARGET_XE "gen9-x16")
set(ISPC_TARGET_XE "xehpg-x16")
set(ISPC_TARGET_CPU "sse4-i8x16;avx1-i32x16;avx2-i32x16;avx512skx-x16")
set(HOST_SOURCES mandelbrot.cpp mandelbrot_serial.cpp)
examples/xpu/noise/CMakeLists.txt
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2019-2023, Intel Corporation
# Copyright (c) 2019-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "noise")
set(ISPC_SRC_NAME "noise.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(HOST_SOURCES noise.cpp noise_serial.cpp)
add_perf_example(
examples/xpu/pipeline-dpcpp/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2023, Intel Corporation
# Copyright (c) 2020-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "pipeline-dpcpp")
set(ISPC_SRC_NAME "pipeline-dpcpp.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(DPCPP_HOST_SOURCES pipeline-dpcpp.cpp)
if(UNIX)
examples/xpu/sgemm/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2019-2023, Intel Corporation
# Copyright (c) 2019-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "sgemm")
set(ISPC_SRC_NAME "naive_sgemm.ispc")
set(ISPC_TARGET_XE "gen9-x16")
set(ISPC_TARGET_XE "xehpg-x16")
set(HOST_SOURCES sgemm.cpp main.cpp)
add_perf_example(
examples/xpu/simple-dpcpp-l0/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2023, Intel Corporation
# Copyright (c) 2020-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "simple-dpcpp-l0")
set(ISPC_SRC_NAME "simple-dpcpp-l0.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(DPCPP_HOST_SOURCES simple-dpcpp-l0.cpp)
if(UNIX)
examples/xpu/simple-dpcpp/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2021-2023, Intel Corporation
# Copyright (c) 2021-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "simple-dpcpp")
set(ISPC_SRC_NAME "simple-dpcpp.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(DPCPP_HOST_SOURCES simple-dpcpp.cpp)
if(UNIX)
examples/xpu/simple-fence/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2023, Intel Corporation
# Copyright (c) 2023-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "simple-fence")
set(ISPC_SRC_NAME "simple-fence.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(HOST_SOURCES simple-fence.cpp)
add_perf_example(
examples/xpu/simple-usm/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2023, Intel Corporation
# Copyright (c) 2020-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "simple-usm")
set(ISPC_SRC_NAME "simple-usm.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(HOST_SOURCES simple-usm.cpp)
add_perf_example(
examples/xpu/simple/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2020-2023, Intel Corporation
# Copyright (c) 2020-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "simple")
set(ISPC_SRC_NAME "simple.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(HOST_SOURCES simple.cpp)
add_perf_example(
examples/xpu/usm-mem/CMakeLists.txt
+2 -2
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@@ -1,5 +1,5 @@
#
# Copyright (c) 2022-2023, Intel Corporation
# Copyright (c) 2022-2025, Intel Corporation
#
# SPDX-License-Identifier: BSD-3-Clause
@@ -11,7 +11,7 @@ cmake_minimum_required(VERSION 3.13)
set(TEST_NAME "usm-mem")
set(ISPC_SRC_NAME "usm-mem.ispc")
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
set(HOST_SOURCES usm-mem.cpp)
add_perf_example(
ispcrt/cmake/ispc.cmake
+3 -3
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@@ -273,14 +273,14 @@ endmacro()
## GPU specific macros/options ################################################
###############################################################################
define_ispc_isa_options(XE gen9-x8 gen9-x16 xelp-x8 xelp-x16 xehpc-x16 xehpc-x32 xehpg-x8 xehpg-x16)
define_ispc_isa_options(XE xelp-x8 xelp-x16 xehpc-x16 xehpc-x32 xehpg-x8 xehpg-x16)
set(ISPC_XE_ADDITIONAL_ARGS "" CACHE STRING "extra arguments to pass to ISPC for Xe targets")
function(ispc_gpu_target_add_sources TARGET_NAME PARENT_TARGET_NAME)
# Check If GPU target is passed externally
if (NOT ISPC_TARGET_XE)
set(ISPC_TARGET_XE "gen9-x8")
set(ISPC_TARGET_XE "xehpg-x8")
endif()
if (NOT ISPC_TARGET_DIR)
@@ -288,7 +288,7 @@ function(ispc_gpu_target_add_sources TARGET_NAME PARENT_TARGET_NAME)
endif()
set(ISPC_PROGRAM_COUNT 16)
if ("${ISPC_TARGET_XE}" STREQUAL "gen9-x8" OR
if ("${ISPC_TARGET_XE}" STREQUAL "xehpg-x8" OR
"${ISPC_TARGET_XE}" STREQUAL "xelp-x8")
set(ISPC_PROGRAM_COUNT 8)
endif()
scripts/bitcode2cpp.py
+1 -1
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@@ -151,7 +151,7 @@ with NamedTemporaryFile(mode='w', dir=dirname(output), delete=False) as outfile:
arch = "riscv64"
elif "wasm" in target and not "generic" in target:
arch = "wasm32" if args[0].runtime == "32" else "wasm64" if args[0].runtime == "64" else "error"
elif ("gen9" in target) or ("xe" in target):
elif "xe" in target:
arch = "xe64"
elif ("generic" in target):
arch = args[0].arch
scripts/run_tests.py
+1 -1
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@@ -88,7 +88,7 @@ class TargetConfig(object):
else:
self.arch = arch
self.target = target
self.xe = target.find("gen9") != -1 or target.find("xe") != -1
self.xe = target.find("xe") != -1
self.set_cpu(cpu)
self.set_target()
src/args.cpp
-5
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@@ -1266,11 +1266,6 @@ ArgsParseResult ispc::ParseCommandLineArgs(int argc, char *argv[], std::string &
output.type = Module::SPIRV;
}
}
if (target == ISPCTarget::gen9_x8 || target == ISPCTarget::gen9_x16) {
Warning(SourcePos(), "The target %s is deprecated and will be removed in the future.",
ISPCTargetToString(target).c_str());
}
}
#endif
src/builtins.cpp
+1 -3
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@@ -547,9 +547,7 @@ std::unordered_map<ISPCTarget, ISPCTarget> targetParentMap = {
{ISPCTarget::wasm_i32x4, ISPCTarget::generic_i32x4}
/*{ISPCTarget::gen9_x8, ISPCTarget::generic_i1x8},
{ISPCTarget::gen9_x16, ISPCTarget::generic_i1x16},
{ISPCTarget::xelp_x8, ISPCTarget::generic_i1x8},
/*{ISPCTarget::xelp_x8, ISPCTarget::generic_i1x8},
{ISPCTarget::xelp_x16, ISPCTarget::generic_i1x16},
{ISPCTarget::xehpg_x8, ISPCTarget::generic_i1x8},
{ISPCTarget::xehpg_x16, ISPCTarget::generic_i1x16},
src/ispc.cpp
+11 -61
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@@ -398,7 +398,6 @@ typedef enum {
#endif // ISPC_LLVM_VERSION
#endif // ISPC_RISCV_ENABLED
#ifdef ISPC_XE_ENABLED
GPU_SKL,
GPU_TGLLP,
GPU_ACM_G10,
GPU_ACM_G11,
@@ -505,7 +504,6 @@ std::map<DeviceType, std::set<std::string>> CPUFeatures = {
#endif // ISPC_LLVM_VERSION
#endif // ISPC_RISCV_ENABLED
#ifdef ISPC_XE_ENABLED
{GPU_SKL, {}},
{GPU_TGLLP, {}},
{GPU_ACM_G10, {}},
{GPU_ACM_G11, {}},
@@ -636,7 +634,6 @@ class AllCPUs {
#endif // ISPC_RISCV_ENABLED
#ifdef ISPC_XE_ENABLED
names[GPU_SKL].push_back("skl");
names[GPU_TGLLP].push_back("tgllp");
names[GPU_TGLLP].push_back("dg1");
// ACM 512EU version
@@ -756,20 +753,19 @@ class AllCPUs {
#endif // ISPC_RISCV_ENABLED
#ifdef ISPC_XE_ENABLED
compat[GPU_SKL] = Set(GPU_SKL, CPU_None);
compat[GPU_TGLLP] = Set(GPU_TGLLP, GPU_SKL, CPU_None);
compat[GPU_ACM_G10] = Set(GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, GPU_SKL, CPU_None);
compat[GPU_ACM_G11] = Set(GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, GPU_SKL, CPU_None);
compat[GPU_ACM_G12] = Set(GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, GPU_SKL, CPU_None);
compat[GPU_PVC] = Set(GPU_PVC, GPU_SKL, CPU_None);
compat[GPU_TGLLP] = Set(GPU_TGLLP, CPU_None);
compat[GPU_ACM_G10] = Set(GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, CPU_None);
compat[GPU_ACM_G11] = Set(GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, CPU_None);
compat[GPU_ACM_G12] = Set(GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, CPU_None);
compat[GPU_PVC] = Set(GPU_PVC, CPU_None);
compat[GPU_MTL_U] =
Set(GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_ACM_G11, GPU_TGLLP, GPU_SKL, CPU_None);
Set(GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_ACM_G11, GPU_TGLLP, CPU_None);
compat[GPU_MTL_H] =
Set(GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_ACM_G11, GPU_TGLLP, GPU_SKL, CPU_None);
Set(GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_ACM_G11, GPU_TGLLP, CPU_None);
compat[GPU_BMG_G21] =
Set(GPU_BMG_G21, GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, GPU_SKL, CPU_None);
Set(GPU_BMG_G21, GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, CPU_None);
compat[GPU_LNL_M] =
Set(GPU_LNL_M, GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, GPU_SKL, CPU_None);
Set(GPU_LNL_M, GPU_MTL_U, GPU_MTL_H, GPU_ACM_G10, GPU_ACM_G11, GPU_ACM_G12, GPU_TGLLP, CPU_None);
#endif
}
@@ -1005,9 +1001,6 @@ Target::Target(Arch arch, const char *cpu, ISPCTarget ispc_target, PICLevel picL
#endif // ISPC_RISCV_ENABLED
#ifdef ISPC_XE_ENABLED
case GPU_SKL:
m_ispc_target = ISPCTarget::gen9_x16;
break;
case GPU_TGLLP:
m_ispc_target = ISPCTarget::xelp_x16;
break;
@@ -1873,20 +1866,6 @@ Target::Target(Arch arch, const char *cpu, ISPCTarget ispc_target, PICLevel picL
break;
#endif
#ifdef ISPC_XE_ENABLED
case ISPCTarget::gen9_x8:
this->m_isa = Target::GEN9;
this->m_nativeVectorWidth = 8;
this->m_nativeVectorAlignment = 64;
this->m_vectorWidth = 8;
this->m_dataTypeWidth = 32;
this->m_hasGather = this->m_hasScatter = true;
this->m_maskingIsFree = true;
this->m_maskBitCount = 1;
setCapabilities({TargetCapability::HalfConverts, TargetCapability::HalfFullSupport,
TargetCapability::SaturatingArithmetic, TargetCapability::Transcendentals,
TargetCapability::Trigonometry});
CPUfromISA = GPU_SKL;
break;
case ISPCTarget::xelp_x8:
this->m_isa = Target::XELP;
this->m_nativeVectorWidth = 8;
@@ -1901,20 +1880,6 @@ Target::Target(Arch arch, const char *cpu, ISPCTarget ispc_target, PICLevel picL
TargetCapability::Trigonometry});
CPUfromISA = GPU_TGLLP;
break;
case ISPCTarget::gen9_x16:
this->m_isa = Target::GEN9;
this->m_nativeVectorWidth = 16;
this->m_nativeVectorAlignment = 64;
this->m_vectorWidth = 16;
this->m_dataTypeWidth = 32;
this->m_hasGather = this->m_hasScatter = true;
this->m_maskingIsFree = true;
this->m_maskBitCount = 1;
setCapabilities({TargetCapability::HalfConverts, TargetCapability::HalfFullSupport,
TargetCapability::SaturatingArithmetic, TargetCapability::Transcendentals,
TargetCapability::Trigonometry});
CPUfromISA = GPU_SKL;
break;
case ISPCTarget::xelp_x16:
this->m_isa = Target::XELP;
this->m_nativeVectorWidth = 16;
@@ -2070,8 +2035,6 @@ Target::Target(Arch arch, const char *cpu, ISPCTarget ispc_target, PICLevel picL
CPUfromISA = GPU_LNL_M;
break;
#else
case ISPCTarget::gen9_x8:
case ISPCTarget::gen9_x16:
case ISPCTarget::xelp_x8:
case ISPCTarget::xelp_x16:
case ISPCTarget::xehpg_x8:
@@ -2668,8 +2631,6 @@ const char *Target::ISAToString(ISA isa) {
return "avx10.2";
#endif
#ifdef ISPC_XE_ENABLED
case Target::GEN9:
return "gen9";
case Target::XELP:
return "xelp";
case Target::XEHPG:
@@ -2705,8 +2666,6 @@ const char *Target::ISAToTargetString(ISA isa) {
return "wasm-i32x4";
#endif
#ifdef ISPC_XE_ENABLED
case Target::GEN9:
return "gen9-x16";
case Target::XELP:
return "xelp-x16";
case Target::XEHPG:
@@ -2837,9 +2796,6 @@ Target::ISA Target::TargetToISA(ISPCTarget target) {
return Target::ISA::NUM_ISAS;
#endif // ISPC_WASM_ENABLED
#ifdef ISPC_XE_ENABLED
case ISPCTarget::gen9_x8:
case ISPCTarget::gen9_x16:
return Target::ISA::GEN9;
case ISPCTarget::xelp_x8:
case ISPCTarget::xelp_x16:
return Target::ISA::XELP;
@@ -2859,8 +2815,6 @@ Target::ISA Target::TargetToISA(ISPCTarget target) {
case ISPCTarget::xe2lpg_x32:
return Target::ISA::XE2LPG;
#else // ISPC_XE_ENABLED
case ISPCTarget::gen9_x8:
case ISPCTarget::gen9_x16:
case ISPCTarget::xelp_x8:
case ISPCTarget::xelp_x16:
case ISPCTarget::xehpg_x8:
@@ -3004,8 +2958,6 @@ void Target::markFuncWithCallingConv(llvm::Function *func) {
Target::XePlatform Target::getXePlatform() const {
AllCPUs a;
switch (a.GetTypeFromName(m_cpu)) {
case GPU_SKL:
return XePlatform::gen9;
case GPU_TGLLP:
return XePlatform::xe_lp;
case GPU_ACM_G10:
@@ -3022,14 +2974,13 @@ Target::XePlatform Target::getXePlatform() const {
case GPU_LNL_M:
return XePlatform::xe2_lpg;
default:
return XePlatform::gen9;
return XePlatform::xe_hpg;
}
return XePlatform::gen9;
return XePlatform::xe_hpg;
}
uint32_t Target::getXeGrfSize() const {
switch (getXePlatform()) {
case XePlatform::gen9:
case XePlatform::xe_lp:
case XePlatform::xe_hpg:
return 32;
@@ -3047,7 +2998,6 @@ uint32_t Target::getXeGrfSize() const {
bool Target::hasXePrefetch() const {
switch (getXePlatform()) {
case XePlatform::gen9:
case XePlatform::xe_lp:
return false;
default:
src/ispc.h
+2 -4
View File
@@ -266,7 +266,6 @@ class Target {
WASM,
#endif
#ifdef ISPC_XE_ENABLED
GEN9,
XELP,
XEHPG,
XEHPC,
@@ -279,7 +278,6 @@ class Target {
#ifdef ISPC_XE_ENABLED
enum class XePlatform {
gen9,
xe_lp,
xe_hpg,
xe_lpg,
@@ -374,8 +372,8 @@ class Target {
bool isXeTarget() {
#ifdef ISPC_XE_ENABLED
return m_isa == Target::GEN9 || m_isa == Target::XELP || m_isa == Target::XEHPG || m_isa == Target::XEHPC ||
m_isa == Target::XELPG || m_isa == Target::XE2HPG || m_isa == Target::XE2LPG;
return m_isa == Target::XELP || m_isa == Target::XEHPG || m_isa == Target::XEHPC || m_isa == Target::XELPG ||
m_isa == Target::XE2HPG || m_isa == Target::XE2LPG;
#else
return false;
#endif
src/target_enums.cpp
+1 -15
View File
@@ -225,11 +225,7 @@ ISPCTarget operator++(ISPCTarget &target, int dummy) {
"Enum ISPCTarget is not sequential");
static_assert(static_cast<underlying>(ISPCTarget::wasm_i32x4) == static_cast<underlying>(ISPCTarget::rvv_x4) + 1,
"Enum ISPCTarget is not sequential");
static_assert(static_cast<underlying>(ISPCTarget::gen9_x8) == static_cast<underlying>(ISPCTarget::wasm_i32x4) + 1,
"Enum ISPCTarget is not sequential");
static_assert(static_cast<underlying>(ISPCTarget::gen9_x16) == static_cast<underlying>(ISPCTarget::gen9_x8) + 1,
"Enum ISPCTarget is not sequential");
static_assert(static_cast<underlying>(ISPCTarget::xelp_x8) == static_cast<underlying>(ISPCTarget::gen9_x16) + 1,
static_assert(static_cast<underlying>(ISPCTarget::xelp_x8) == static_cast<underlying>(ISPCTarget::wasm_i32x4) + 1,
"Enum ISPCTarget is not sequential");
static_assert(static_cast<underlying>(ISPCTarget::xelp_x16) == static_cast<underlying>(ISPCTarget::xelp_x8) + 1,
"Enum ISPCTarget is not sequential");
@@ -466,10 +462,6 @@ ISPCTarget ParseISPCTarget(std::string target) {
return ISPCTarget::rvv_x4;
} else if (target == "wasm-i32x4") {
return ISPCTarget::wasm_i32x4;
} else if (target == "gen9-x8") {
return ISPCTarget::gen9_x8;
} else if (target == "gen9-x16" || target == "gen9") {
return ISPCTarget::gen9_x16;
} else if (target == "xelp-x8") {
return ISPCTarget::xelp_x8;
} else if (target == "xelp-x16" || target == "xelp") {
@@ -663,10 +655,6 @@ std::string ISPCTargetToString(ISPCTarget target) {
return "rvv-x4";
case ISPCTarget::wasm_i32x4:
return "wasm-i32x4";
case ISPCTarget::gen9_x8:
return "gen9-x8";
case ISPCTarget::gen9_x16:
return "gen9-x16";
case ISPCTarget::xelp_x8:
return "xelp-x8";
case ISPCTarget::xelp_x16:
@@ -814,8 +802,6 @@ bool ISPCTargetIsWasm(ISPCTarget target) {
bool ISPCTargetIsGen(ISPCTarget target) {
switch (target) {
case ISPCTarget::gen9_x8:
case ISPCTarget::gen9_x16:
case ISPCTarget::xelp_x8:
case ISPCTarget::xelp_x16:
case ISPCTarget::xehpg_x8:
src/target_enums.h
-2
View File
@@ -88,8 +88,6 @@ enum class ISPCTarget {
neon_i32x8,
rvv_x4,
wasm_i32x4,
gen9_x8,
gen9_x16,
xelp_x8,
xelp_x16,
xehpg_x8,
stdlib/include/core.isph
+2 -3
View File
@@ -27,9 +27,8 @@
// This lets the user know __attribute__ is part of language.
#define ISPC_ATTRIBUTE_SUPPORTED 1
#if defined(ISPC_TARGET_GEN9) || defined(ISPC_TARGET_XELP) || defined(ISPC_TARGET_XEHPG) || \
defined(ISPC_TARGET_XEHPC) || defined(ISPC_TARGET_XELPG) || defined(ISPC_TARGET_XE2HPG) || \
defined(ISPC_TARGET_XE2LPG)
#if defined(ISPC_TARGET_XELP) || defined(ISPC_TARGET_XEHPG) || defined(ISPC_TARGET_XEHPC) || \
defined(ISPC_TARGET_XELPG) || defined(ISPC_TARGET_XE2HPG) || defined(ISPC_TARGET_XE2LPG)
#define ISPC_TARGET_XE
#endif
tests/lit-tests/alloca.ispc
+1 -1
View File
@@ -1,6 +1,6 @@
// Test to check 'alloca()' implementation.
// RUN: %{ispc} %s --target=host --nowrap -O0 --emit-llvm-text -o - | FileCheck %s
// RUN: %{ispc} %s --target=gen9-x8 --nowrap -O0 --emit-llvm-text -o - | FileCheck %s -check-prefix=CHECK-XE
// RUN: %{ispc} %s --target=xehpg-x8 --nowrap -O0 --emit-llvm-text -o - | FileCheck %s -check-prefix=CHECK-XE
// REQUIRES: X86_ENABLED
// REQUIRES: XE_ENABLED
tests/lit-tests/fp16_support.ispc
+1 -1
View File
@@ -1,6 +1,6 @@
// This test checks that ISPC_TARGET_HAS_FP16_SUPPORT macro is ON for XE and ARM platforms only.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text -o - | FileCheck %s --check-prefixes=CHECK_FP_16,CHECK
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text -o - | FileCheck %s --check-prefixes=CHECK_FP_16,CHECK
// RUN: %{ispc} %s --target=neon-i8x16 --arch=arm --emit-llvm-text -o - | FileCheck %s --check-prefixes=CHECK_FP_16,CHECK
// RUN: %{ispc} %s --target=neon-i32x4 --arch=aarch64 --emit-llvm-text -o - | FileCheck %s --check-prefixes=CHECK_FP_16,CHECK
// RUN: %{ispc} %s --target=avx2-i32x8 --arch=x86 --emit-llvm-text -o - | FileCheck %s --check-prefixes=CHECK_FP_NO_16,CHECK
tests/lit-tests/fp64_support.ispc
+1 -1
View File
@@ -1,4 +1,4 @@
// RUN: %{ispc} %s --target=gen9-x16 --device=skl -h %t.h --emit-llvm-text -o %t.ll
// RUN: %{ispc} %s --target=xehpc-x16 --device=pvc -h %t.h --emit-llvm-text -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_FP64_SUPPORTED %s
// RUN: %{ispc} %s --target=xelp-x16 --device=tgllp -h %t.h --emit-llvm-text -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_FP64_NOT_SUPPORTED %s
tests/lit-tests/intrinsic_xe.ispc
+1 -1
View File
@@ -1,4 +1,4 @@
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --enable-llvm-intrinsics -h %t.h --emit-llvm-text -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --enable-llvm-intrinsics -h %t.h --emit-llvm-text -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s
// REQUIRES: XE_ENABLED
tests/lit-tests/load_store_vectorizer_loopunroll.ispc
+2 -2
View File
@@ -8,9 +8,9 @@
// for resulting vector and "poison" starting from LLVM 14.0 (llvm/llvm-project@cf284f6)
// It's safe transformation since poison values will be always overwriten with a different value.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=325:325 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=325:325 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_325_LoadStoreVectorizerPass.ll %s --check-prefixes CHECK_ALL,CHECK
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=325:325 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=325:325 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_325_LoadStoreVectorizerPass.ll %s --check-prefixes CHECK_ALL,CHECK
// REQUIRES: XE_ENABLED
tests/lit-tests/print_errors_xe.ispc
+6 -6
View File
@@ -1,17 +1,17 @@
// This test checks that compiler does not crash and produces correct error output
// for different print arguments for Xe.
// RUN: not %{ispc} %s -o %t.spv -DPRINT_1 --emit-spirv --nowrap --target=gen9-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_1
// RUN: not %{ispc} %s -o %t.spv -DPRINT_1 --emit-spirv --nowrap --target=xehpg-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_1
// RUN: %{ispc} %s -o %t.spv -DPRINT_2 --emit-spirv --nowrap --target=gen9-x8
// RUN: %{ispc} %s -o %t.spv -DPRINT_2 --emit-spirv --nowrap --target=xehpg-x8
// RUN: not %{ispc} %s -o %t.spv -DPRINT_3 --emit-spirv --nowrap --target=gen9-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_3
// RUN: not %{ispc} %s -o %t.spv -DPRINT_3 --emit-spirv --nowrap --target=xehpg-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_3
// RUN: not %{ispc} %s -o %t.spv -DPRINT_4 --emit-spirv --nowrap --target=gen9-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_4
// RUN: not %{ispc} %s -o %t.spv -DPRINT_4 --emit-spirv --nowrap --target=xehpg-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_4
// RUN: not %{ispc} %s -o %t.spv -DPRINT_5 --emit-spirv --nowrap --target=gen9-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_5
// RUN: not %{ispc} %s -o %t.spv -DPRINT_5 --emit-spirv --nowrap --target=xehpg-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_5
// RUN: not %{ispc} %s -o %t.spv -DPRINT_6 --emit-spirv --nowrap --target=gen9-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_6
// RUN: not %{ispc} %s -o %t.spv -DPRINT_6 --emit-spirv --nowrap --target=xehpg-x8 2>&1 | FileCheck %s -check-prefix=CHECK_ERROR_6
// REQUIRES: XE_ENABLED
tests/lit-tests/skl-deprecation.ispc
-9
View File
@@ -1,9 +0,0 @@
// RUN: %{ispc} --nowrap --target=gen9-x8 --emit-spirv -o %t.spv %s 2>&1 | FileCheck %s --check-prefix=CHECK_GEN9-X8
// RUN: %{ispc} --nowrap --target=gen9-x16 --emit-spirv -o %t.spv %s 2>&1 | FileCheck %s --check-prefix=CHECK_GEN9-X16
// REQUIRES: XE_ENABLED
// CHECK_GEN9-X8: Warning: The target gen9-x8 is deprecated and will be removed in the future.
// CHECK_GEN9-X16: Warning: The target gen9-x16 is deprecated and will be removed in the future.
void foo() {}
tests/lit-tests/task_vars.ispc
+3 -3
View File
@@ -7,13 +7,13 @@
// be the same for CPU and Xe targets.
// RUN: not %{ispc} %s -o %t.o --nowrap -DEXPORT_FUNC 2>&1 | FileCheck %s -check-prefix=CHECK-EXPORT_EXTERN_FUNC
// RUN: not %{ispc} %s -o %t.o --target=gen9-x8 --nowrap -DEXPORT_FUNC 2>&1 | FileCheck %s -check-prefix=CHECK-EXPORT_EXTERN_FUNC
// RUN: not %{ispc} %s -o %t.o --target=xehpg-x8 --nowrap -DEXPORT_FUNC 2>&1 | FileCheck %s -check-prefix=CHECK-EXPORT_EXTERN_FUNC
// RUN: not %{ispc} %s -o %t.o --nowrap -DTASK_FUNC 2>&1 | FileCheck %s -check-prefix=CHECK-TASK_FUNC
// RUN: not %{ispc} %s -o %t.o --target=gen9-x8 --nowrap -DTASK_FUNC 2>&1 | FileCheck %s -check-prefix=CHECK-TASK_FUNC
// RUN: not %{ispc} %s -o %t.o --target=xehpg-x8 --nowrap -DTASK_FUNC 2>&1 | FileCheck %s -check-prefix=CHECK-TASK_FUNC
// RUN: not %{ispc} %s -o %t.o --nowrap 2>&1 | FileCheck %s -check-prefix=CHECK-EXPORT_EXTERN_FUNC
// RUN: not %{ispc} %s -o %t.o --target=gen9-x8 --nowrap 2>&1 | FileCheck %s -check-prefix=CHECK-EXPORT_EXTERN_FUNC
// RUN: not %{ispc} %s -o %t.o --target=xehpg-x8 --nowrap 2>&1 | FileCheck %s -check-prefix=CHECK-EXPORT_EXTERN_FUNC
// CHECK-EXPORT_EXTERN_FUNC: Error: Undeclared symbol "taskIndex0".
// CHECK-EXPORT_EXTERN_FUNC: Error: Undeclared symbol "taskIndex1".
tests/lit-tests/xe_assert.ispc
+1 -1
View File
@@ -1,7 +1,7 @@
// This test checks correct LLVM IR generation when assert is used on Xe target.
// TODO: add test case with assert inside exported function when support is added to VC backend.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// REQUIRES: XE_ENABLED
//CHECK: @lz_format_str = internal unnamed_addr addrspace(2) constant [{{.*}} x i8] c"{{.*}}xe_assert.ispc:13:3: Assertion failed: a > 0 \0A\00", align 1
tests/lit-tests/xe_barrier.ispc
+1 -1
View File
@@ -1,6 +1,6 @@
// This test checks correct LLVM IR generation when memory_barrier is used on Xe target.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// REQUIRES: XE_ENABLED
task void barrier() {
tests/lit-tests/xe_devices.ispc
-11
View File
@@ -1,13 +1,11 @@
// The test checks that GPU device/target definitions (including all synonyms) are successfully consumed by compiler.
// XeLP
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x8 --device=skl
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x8 --device=tgllp
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x8 --device=dg1
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x8 --device=acm-g10
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x8 --device=acm-g11
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x8 --device=acm-g12
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x16 --device=skl
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x16 --device=tgllp
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x16 --device=dg1
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x16 --device=acm-g10
@@ -15,13 +13,11 @@
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelp-x16 --device=acm-g12
// XeHPG
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x8 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x8 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x8 --device=dg1
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x8 --device=acm-g10
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x8 --device=acm-g11
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x8 --device=acm-g12
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x16 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x16 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x16 --device=dg1
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x16 --device=acm-g10
@@ -29,7 +25,6 @@
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpg-x16 --device=acm-g12
// XeHPC
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpc-x16 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpc-x16 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpc-x16 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpc-x16 --device=acm-g10
@@ -38,7 +33,6 @@
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xehpc-x16 --device=pvc
// XeLPG
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=acm-g10
@@ -46,7 +40,6 @@
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=acm-g12
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=mtl-u
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x8 --device=mtl-h
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x16 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x16 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x16 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x16 --device=acm-g10
@@ -56,7 +49,6 @@
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xelpg-x16 --device=mtl-h
// Xe2HPG
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=acm-g10
@@ -65,7 +57,6 @@
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=mtl-u
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=mtl-h
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x16 --device=bmg-g21
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x32 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x32 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x32 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x32 --device=acm-g10
@@ -76,7 +67,6 @@
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2hpg-x32 --device=bmg-g21
// Xe2LPG
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=acm-g10
@@ -86,7 +76,6 @@
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=mtl-h
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=bmg-g21
// RUN: %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x16 --device=lnl-m
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x32 --device=skl
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x32 --device=tgllp
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x32 --device=dg1
// RUN: not %{ispc} %s -o %t.bin --emit-zebin --nostdlib --target=xe2lpg-x32 --device=acm-g10
tests/lit-tests/xe_double_support.ispc
+1 -2
View File
@@ -1,5 +1,4 @@
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-spirv --nowrap -o %t.spv
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --device=skl --emit-spirv --nowrap -o %t.spv
// RUN: %{ispc} %s --target=xehpc-x16 --arch=xe64 --emit-spirv --nowrap -o %t.spv
// RUN: not %{ispc} %s --target=xelp-x16 --arch=xe64 --device=tgllp --emit-spirv --nowrap -o %t.spv 2>&1 | FileCheck %s -check-prefix=CHECK_DOUBLE_ERROR
// RUN: not %{ispc} %s --target=xelp-x16 --arch=xe64 --device=dg1 --emit-spirv --nowrap -o %t.spv 2>&1 | FileCheck %s -check-prefix=CHECK_DOUBLE_ERROR
// RUN: not %{ispc} %s --target=xehpg-x16 --arch=xe64 --device=acm-g11 --emit-spirv --nowrap -o %t.spv 2>&1 | FileCheck %s -check-prefix=CHECK_DOUBLE_ERROR
tests/lit-tests/xe_dwarf_addrspace.ispc
+1 -1
View File
@@ -1,5 +1,5 @@
// This test checks that dwarfAddressSpace attribute is present in DIDerivedType metadata for Xe targets.
// RUN: %{ispc} %s --target=gen9-x8 -g --emit-llvm-text -o - | FileCheck %s
// RUN: %{ispc} %s --target=xehpg-x8 -g --emit-llvm-text -o - | FileCheck %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_externC.ispc
+1 -1
View File
@@ -1,7 +1,7 @@
// The test checks code generation for extern "C" function definitions on GPU.
// Check GPU:
// RUN: %{ispc} %s --target=gen9-x8 --emit-llvm-text --nowrap -o - | FileCheck %s -check-prefix=CHECK_GPU
// RUN: %{ispc} %s --target=xehpg-x8 --emit-llvm-text --nowrap -o - | FileCheck %s -check-prefix=CHECK_GPU
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_foreach_unique.ispc
+1 -1
View File
@@ -1,5 +1,5 @@
// This tests checks that EEI is used (instead of GEP) to get unique value in foreach_unique statement for Xe target.
// RUN: %{ispc} %s --target=gen9-x8 -O0 --emit-llvm-text --no-discard-value-names --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xehpg-x8 -O0 --emit-llvm-text --no-discard-value-names --nowrap -o - | FileCheck %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing.ispc
+2 -2
View File
@@ -5,9 +5,9 @@
// are split into separate tests.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD_INLINE4,CHECK_LOAD_INLINE16
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD_INLINE4,CHECK_LOAD_INLINE16
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing_loop.ispc
+2 -2
View File
@@ -3,9 +3,9 @@
// for the XeGatherCoalescing pass to perform.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing_loopunroll.ispc
+2 -2
View File
@@ -7,9 +7,9 @@
// no optimization.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD_PRAGMA4,CHECK_LOAD_INLINE4,CHECK_LOAD_INLINE8
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD_PRAGMA4,CHECK_LOAD_INLINE4,CHECK_LOAD_INLINE8
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing_ptr.ispc
+2 -2
View File
@@ -11,9 +11,9 @@
// %vectorized_extr_elem222 = extractelement <3 x float> %vectorized_ld, i64 2
// %vectorized_extr_elem221 = extractelement <3 x float> %vectorized_ld, i64 3
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 --emit-llvm-text -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 --emit-llvm-text -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing_ptr_alloca.ispc
+2 -2
View File
@@ -18,9 +18,9 @@
// %vectorized_extr_elem222 = extractelement <3 x float> %vectorized_ld, i64 2
// %vectorized_extr_elem221 = extractelement <3 x float> %vectorized_ld, i64 3
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing_ptr_indvar.ispc
+2 -2
View File
@@ -18,9 +18,9 @@
// %vectorized_extr_elem222 = extractelement <3 x float> %vectorized_ld, i64 2
// %vectorized_extr_elem221 = extractelement <3 x float> %vectorized_ld, i64 3
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD,CHECK_VARYING
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK_LOAD,CHECK_VARYING
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_coalescing_varying.ispc
+2 -2
View File
@@ -8,9 +8,9 @@
// memory level parallelism.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -h %t.h --emit-llvm-text --debug-phase=321:321 --dump-file=%t -o /dev/null
// RUN: FileCheck --input-file %t/ir_321_ispcMemoryCoalescing.ll %s --check-prefixes CHECK_ALL,CHECK
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_gather_test.ispc
+1 -1
View File
@@ -1,4 +1,4 @@
// RUN: %{ispc} %s --target=gen9-x16 --no-discard-value-names --arch=xe64 -h %t.h --emit-llvm-text -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --no-discard-value-names --arch=xe64 -h %t.h --emit-llvm-text -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_half_support.ispc
+2 -2
View File
@@ -1,7 +1,7 @@
// COM: Xe Gather Coalescing is disabled to not perform redundant optimizations on gathers.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll --opt=disable-xe-gather-coalescing
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll --opt=disable-xe-gather-coalescing
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_XE_16 %s
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll --opt=disable-xe-gather-coalescing
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll --opt=disable-xe-gather-coalescing
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_XE_8 %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_invoke_sycl.ispc
+5 -5
View File
@@ -9,7 +9,7 @@
// RUN: FileCheck %s -check-prefix=CHECK_MULTI_CPU2 --input-file=%t_avx2.ll
// Check GPU:
// RUN: %{ispc} %s --target=gen9-x8 --emit-llvm-text --nowrap -o - | FileCheck %s -check-prefix=CHECK_GPU
// RUN: %{ispc} %s --target=xehpg-x8 --emit-llvm-text --nowrap -o - | FileCheck %s -check-prefix=CHECK_GPU
// Check errors
// RUN: not %{ispc} %s --target=avx2-i32x8 -DINVOKE_SYCL_NOT_EXTERN --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=CHECK_INVOKE_SYCL_NOT_EXTERN_SYCL
@@ -17,10 +17,10 @@
// RUN: not %{ispc} %s --target=avx2-i32x8 -DSYCL_NO_INVOKE --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=SYCL_NO_INVOKE
// RUN: not %{ispc} %s --target=avx2-i32x8 -DINVOKE_SYCL_NO_REGCALL --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=INVOKE_SYCL_NO_REGCALL
// RUN: not %{ispc} %s --target=gen9-x8 -DINVOKE_SYCL_NOT_EXTERN --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=CHECK_INVOKE_SYCL_NOT_EXTERN_SYCL
// RUN: not %{ispc} %s --target=gen9-x8 -DCHECK_EXTERN_SYCL_DEF --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=CHECK_EXTERN_SYCL_DEF
// RUN: not %{ispc} %s --target=gen9-x8 -DSYCL_NO_INVOKE --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=SYCL_NO_INVOKE
// RUN: not %{ispc} %s --target=gen9-x8 -DINVOKE_SYCL_NO_REGCALL --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=INVOKE_SYCL_NO_REGCALL
// RUN: not %{ispc} %s --target=xehpg-x8 -DINVOKE_SYCL_NOT_EXTERN --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=CHECK_INVOKE_SYCL_NOT_EXTERN_SYCL
// RUN: not %{ispc} %s --target=xehpg-x8 -DCHECK_EXTERN_SYCL_DEF --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=CHECK_EXTERN_SYCL_DEF
// RUN: not %{ispc} %s --target=xehpg-x8 -DSYCL_NO_INVOKE --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=SYCL_NO_INVOKE
// RUN: not %{ispc} %s --target=xehpg-x8 -DINVOKE_SYCL_NO_REGCALL --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefix=INVOKE_SYCL_NO_REGCALL
// CHECK_INVOKE_SYCL_NOT_EXTERN_SYCL-COUNT-2: "invoke_sycl" expression illegal with non-'extern "SYCL"'-qualified function.
// CHECK_EXTERN_SYCL_DEF: 'extern "SYCL"' function "extern_sycl_func_def" cannot be defined in ISPC
tests/lit-tests/xe_kernels_spec.ispc
+4 -4
View File
@@ -1,6 +1,6 @@
// This test checks correct emitting of LLVM IR functions definitions for Xe tasks, export and extern "C" functions.
// It also checks datalayout and metadata.
// RUN: %{ispc} %s --target=gen9-x16 --emit-llvm-text --no-discard-value-names -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --emit-llvm-text --no-discard-value-names -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_EXPORT_F1_GPU %s
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_TASK_F1_GPU %s
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_EXPORT_F2_GPU %s
@@ -18,9 +18,9 @@
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_DATALAYOUT %s
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_FUNC_GPU %s
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK_METADATA %s
// RUN: %{ispc} %s --target=gen9-x16 --emit-llvm-text -g --nowrap --no-discard-value-names -o - | FileCheck -check-prefix=CHECK_METADATA_DEBUG %s
// RUN: %{ispc} %s --target=gen9-x16 -DCHECK_DIAG --nowrap --emit-spirv -o %t.spv 2>&1
// RUN: not %{ispc} %s --target=gen9-x16 -DCHECK_DIAG_TASK --nowrap --emit-spirv -o %t.spv 2>&1 | FileCheck %s -check-prefix=CHECK_RET_VAL_TASK_ERROR
// RUN: %{ispc} %s --target=xehpg-x16 --emit-llvm-text -g --nowrap --no-discard-value-names -o - | FileCheck -check-prefix=CHECK_METADATA_DEBUG %s
// RUN: %{ispc} %s --target=xehpg-x16 -DCHECK_DIAG --nowrap --emit-spirv -o %t.spv 2>&1
// RUN: not %{ispc} %s --target=xehpg-x16 -DCHECK_DIAG_TASK --nowrap --emit-spirv -o %t.spv 2>&1 | FileCheck %s -check-prefix=CHECK_RET_VAL_TASK_ERROR
// CPU run to avoid regressions
// RUN: %{ispc} %s --target=avx2-i32x16 --emit-llvm-text --no-discard-value-names -o %t.ll
tests/lit-tests/xe_kernels_spec_addrspace.ispc
+1 -1
View File
@@ -1,5 +1,5 @@
// This test checks calls of export and extern "C" functions on CPU and GPU based on close to real-life example.
// RUN: %{ispc} %s --target=gen9-x8 --emit-llvm-text --nowrap --no-discard-value-names -O0 -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x8 --emit-llvm-text --nowrap --no-discard-value-names -O0 -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefix=CHECK-XE %s
// RUN: %{ispc} %s --target=avx2 --emit-llvm-text --nowrap --no-discard-value-names -O0 -o %t.ll
tests/lit-tests/xe_prefetch.ispc
-1
View File
@@ -3,7 +3,6 @@
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xe2hpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xe2lpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck -check-prefix=CHECK_NO_PREFETCH %s
// RUN: %{ispc} %s --target=xelp-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck -check-prefix=CHECK_NO_PREFETCH %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_prefetchw.ispc
-1
View File
@@ -1,6 +1,5 @@
// Xe platforms do not support write prefetch.
// Check that prefetch/prefetchw instructions are not generated.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck -check-prefix=CHECK_NO_PREFETCH %s
// RUN: %{ispc} %s --target=xelp-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck -check-prefix=CHECK_NO_PREFETCH %s
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck -check-prefix=CHECK_NO_PREFETCH %s
// RUN: %{ispc} %s --target=xehpc-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck -check-prefix=CHECK_NO_PREFETCH %s
tests/lit-tests/xe_regcall-1.ispc
+1 -1
View File
@@ -3,7 +3,7 @@
// in most cases. ISPC follows this convention by default so the same code
// generation will happen for the functions not marked with __regcall keyword as well.
// RUN: %{ispc} %s --target=gen9-x16 --emit-llvm-text --no-discard-value-names --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xehpg-x16 --emit-llvm-text --no-discard-value-names --nowrap -o - | FileCheck %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_regcall.ispc
+1 -1
View File
@@ -1,7 +1,7 @@
// The test checks code generation for __regcall extern "C" function definitions on GPU.
// Check CPU one-target compilation:
// RUN: %{ispc} %s --target=gen9-x8 --emit-llvm-text --nowrap -o - | FileCheck %s -check-prefix=CHECK_GPU
// RUN: %{ispc} %s --target=xehpg-x8 --emit-llvm-text --nowrap -o - | FileCheck %s -check-prefix=CHECK_GPU
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_short_circuit.ispc
+1 -1
View File
@@ -1,4 +1,4 @@
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll %s
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_spirv_ocl_mangle.ispc
+1 -1
View File
@@ -1,6 +1,6 @@
// This test checks that ISPC correctly mangles SPIR-V builtins.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// RUN: %{ispc} %s --target=xehpc-x16 --arch=xe64 --emit-llvm-text --nowrap -o - | FileCheck %s
// REQUIRES: XE_ENABLED && !WINDOWS_HOST
// CHECK-LABEL: @kernel_double
tests/lit-tests/xe_vec_add.ispc
+24 -24
View File
@@ -1,62 +1,62 @@
// This test is checking correct svm.ld/st svm.gather/scatter generation for different types and SIMD width.
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_UNIFORM %s
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DVARYING --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DVARYING --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_VARYING
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DMASKED_ST --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DMASKED_ST --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DMASKED_ST --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DMASKED_ST --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_UNSAFE
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DUNIFORM --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_UNIFORM %s
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DVARYING --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DVARYING --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_VARYING
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DMASKED_ST --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DMASKED_ST --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DMASKED_ST --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DMASKED_ST --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_UNSAFE
// Now process special cases
// i8 simd16
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DUNIFORM -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DUNIFORM -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_UNIFORM %s
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DVARYING -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DVARYING -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_VARYING_I8_SIMD16
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_I8_SIMD16
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_UNSAFE_I8_SIMD16
// for i8 we always generate gathers/scatters since i8x8 is too small for svm ld/st
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DUNIFORM -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DUNIFORM -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_UNIFORM %s
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DVARYING -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DVARYING -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_VARYING_I8_SIMD8
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_I8_SIMD8
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DMASKED_ST -DTEST_I8 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_UNSAFE_I8_SIMD8
// i16 simd16
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DUNIFORM -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DUNIFORM -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_UNIFORM %s
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DVARYING -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DVARYING -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_VARYING_I16_SIMD16
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_I16_SIMD16
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_UNSAFE_I16_SIMD16
// i16 simd8
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DUNIFORM -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DUNIFORM -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll
// RUN: FileCheck --input-file=%t.ll -check-prefixes=CHECK_ALL,CHECK_UNIFORM %s
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DVARYING -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DVARYING -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_VARYING_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_VARYING_I16_SIMD8
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_I16_SIMD8
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 -DMASKED_ST -DTEST_I16 --emit-llvm-text --opt=enable-xe-unsafe-masked-load --nowrap -o %t.ll 2>&1 | FileCheck %s -check-prefixes=CHECK_MASKED_ST_WARN
// RUN: FileCheck --input-file=%t.ll %s -check-prefixes=CHECK_ALL,CHECK_MASKED_ST_UNSAFE_I16_SIMD8
// CHECK_ALL-LABEL: @vadd(
tests/lit-tests/xe_yarpgen_3330730858.ispc
+4 -4
View File
@@ -5,10 +5,10 @@ Seed: 3330730858
Invocation: ../../build/yarpgen --std=ispc
*/
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// REQUIRES: XE_ENABLED
tests/lit-tests/xe_yarpgen_4096674170.ispc
+4 -4
View File
@@ -5,10 +5,10 @@ Seed: 4096674170
Invocation: ../../build/yarpgen --std=ispc
*/
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=gen9-x8 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// RUN: %{ispc} %s --target=gen9-x16 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-spirv -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x8 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// RUN: %{ispc} %s --target=xehpg-x16 --arch=xe64 --emit-spirv --opt=disable-xe-gather-coalescing -o %t.spv
// REQUIRES: XE_ENABLED