azwolskiandClaude Sonnet 4.6
6e021c57e5
Replace all occurrences of the deprecated undef keyword with poison in ISPC's built-in IR library files (builtins/*.ll) and M4 macro files (builtins/util.m4, builtins/util-xe.m4, builtins/svml.m4). Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
36 lines
1.7 KiB
LLVM
36 lines
1.7 KiB
LLVM
;; Copyright (c) 2016-2026, Intel Corporation
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;;
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;; SPDX-License-Identifier: BSD-3-Clause
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; half precision rcp and rsqrt using native AVX512FP16 instructions
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;; they will be invoked only when hardware support is available.
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declare <8 x half> @llvm.x86.avx512fp16.mask.rcp.sh(<8 x half>, <8 x half>, <8 x half>, i8)
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define half @__rcp_uniform_half(half) nounwind readonly alwaysinline {
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%vec = insertelement <8 x half> poison, half %0, i32 0
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%rcp = tail call <8 x half> @llvm.x86.avx512fp16.mask.rcp.sh(<8 x half> %vec, <8 x half> %vec, <8 x half> poison, i8 -1)
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%ret = extractelement <8 x half> %rcp, i32 0
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ret half %ret
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}
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declare <8 x half> @llvm.x86.avx512fp16.mask.rcp.ph.128(<8 x half>, <8 x half>, i8)
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define <8 x half> @__rcp_varying_half(<8 x half>) nounwind readonly alwaysinline {
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%ret = tail call <8 x half> @llvm.x86.avx512fp16.mask.rcp.ph.128(<8 x half> %0, <8 x half> poison, i8 -1)
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ret <8 x half> %ret
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}
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declare <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half>, <8 x half>, <8 x half>, i8)
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define half @__rsqrt_uniform_half(half) nounwind readnone alwaysinline {
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%vec = insertelement <8 x half> poison, half %0, i32 0
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%rsqrt = tail call <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.sh(<8 x half> %vec, <8 x half> %vec, <8 x half> poison, i8 -1)
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%ret = extractelement <8 x half> %rsqrt, i32 0
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ret half %ret
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}
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declare <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.ph.128(<8 x half>, <8 x half>, i8)
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define <8 x half> @__rsqrt_varying_half(<8 x half>) nounwind readnone alwaysinline {
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%ret = tail call <8 x half> @llvm.x86.avx512fp16.mask.rsqrt.ph.128(<8 x half> %0, <8 x half> poison, i8 -1)
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ret <8 x half> %ret
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}
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