Commit Graph
6 Commits
Author SHA1 Message Date
Alexey Nurmukhametov b0b4aef2d4 Add initial RISC-V architecture support
Implements foundation for RISC-V 64-bit (riscv64) target support with RISC-V
Vector Extension (RVV) ISA, introducing the rvv-x4 target for 4-wide
vectorization.

Key additions:
- RISCV_ENABLED CMake configuration option
- RISC-V target enumeration and ISA definitions
- LLVM backend initialization for RISC-V
- RISC-V target with 4-wide vectorization
- Architecture detection and triple configuration
2025-10-02 09:49:37 -07:00
Aleksei Nurmukhametov 9f3dc8badc bitcode2cpp.py: remove unused imports 2025-07-11 13:55:37 -07:00
Aleksei Nurmukhametov e774af2b82 generic: base wasm targets on generic 2025-04-29 10:41:50 -07:00
Arina Neshlyaeva 43f0c626ce Use armv8a instead of armv7for 'arm' arch 2025-01-23 02:12:13 +00:00
Aleksei Nurmukhametov 45c0904aff Add generic targets
Definitions and build targets for targets:

    generic_i1x4
    generic_i1x8
    generic_i1x16
    generic_i1x32
    generic_i1x64
    generic_i8x16
    generic_i8x32
    generic_i16x8
    generic_i16x16
    generic_i32x4
    generic_i32x8
    generic_i32x16
    generic_i64x4
2025-01-08 19:34:45 +00:00
Aleksei Nurmukhametov f24428c557 Move bitcode2cpp.py to scripts folder 2024-09-20 13:22:36 -07:00